宏基Aspire 5253G E5-574_大学生考试网
宏基Aspire 5253G E5-574
54Laptopblue32101BOMIV@ : iGPU EV@ : Optimus GT@ : N16S-GT / GC6 GM@ : N16V-GM / WO GC6 DR@ : For Dual Rank ( VRAM 8 pcs) KBL@ : Keyboard backlight TPM@ : TPM TPM_N@: For TPM 2.0 TPM_l@ : For TPM 1.2 8M@ : 8M FLASH ROM 4M@ : 4M FLASH ROM GS@ :G-SENSOR TDI@ : TOUCH PAD I2C TSU@ : TOUCH SCREEN USB TSI@ : TOUCH SCREEN I2C GT3@ : GT3 CPU NAC@ : Non IOAC IOAC@ : For IOACDDZoro_SL (ZRW) SKL ULT SYSTEM BLOCK DIAGRAMDDR3L-SODIMM CHAP12Dual Channel DDR III 00 MHZGPU SKY LAKE ULT 15W x4 MCP 1356pins PCI-E TX/RXDC+GT3e 42 mm X 24 mm CLK P14~P19 EDP eDP PCIE1-4VRAM DDR3P18~P19N16S-GT N16V-GMDDR3L-SODIMM CHBP13mIMCX'TAL 27MHzSATA0 SATA - HDD SATA ODDP25se fix .coSATAeDP Conn.P21SATA1P25DDI2ITE6516P20VGA Conn.P21DP DDI1 USB3-1 & USB3-2CCCardreader CONN. 2in 1P28RTS5170 (cardreader)USB2-8Integrated PCHUSB3.0/2.0PS8201P22HDMI Conn.P22P28CCD(Camera)USB2-7USB2-1 & USB2-2P21.roUSB3 Port MB side CN13 -& USB3 port 2 ( up ) CN16 -& USB3 port 1 ( down )P28Touch ScreenUSB2-6USB2.0CLKP21Blue ToothUSB2-5PCI-E x1PCIE-6w w wI/O boardP26USB2-4X'TAL 32.768KHzMINI CARD WLAN+BT RTL8111HP26USB2 IO*1I/O Board Conn.P28 DMIC_CLK0 DMIC_DATA0 P6X'TAL 24MHzPCIE-5RJ45P2310/100/1G P23CLK P2~P10 LPC I2C_0 SPIX'TAL 25MHzBBATTERYRTC IHDABAzaliaSPI ROM 8M+4M P7D-MICP24Int. D-MICALC255 AUDIO CODECP24EC IT8987P29TPM(option)P25BQ24780RUYRBatery ChargerG5316RZ1DP30+1.35VSUSP35Thermal Protection P40 Discharger UP1658RQKF+VGPU_CORETPS51225+3V/+5VMDV1528QP31+5V_S5/+3V_S5/+3V/+5V P31P41RT8237CZQW+1V_S5ISL95859HRTZ-TP32+VCORE/VCCSA/VCCGT P38RT8068AZQW+1.05V_GFX/+3V_GFX +1.5V_GFXP42Universal HPP24Speaker*2P24LEDP27K/B Con.P27K/B BL Con. P27Touch PADP27HALL SENSOR P17Fan Driver(Fan signal) P27NB681GD-Z+VCCOPC/+VCCEOPIOP33AAQuanta Computer Inc.Size Date:5 4 3 2Document NumberP7PROJECT : ZRWBlock DiagramRev 3A 1 of 48 Sheet1Monday, July 20, 201554Laptopblue321Skylake ULT (DISPLAY,eDP)U35ADSKL_ULT02C47 C46 D46 C45 A45 B45 A47 B47 E45 F45 B52 EDP_TXN0 EDP_TXP0 EDP_TXN1 EDP_TXP1D(22) (22) (22) (22) (22) (22) (22) (22)INT_HDMITX2N INT_HDMITX2P INT_HDMITX1N INT_HDMITX1P INT_HDMITX0N INT_HDMITX0P INT_HDMICLKINT_HDMICLK+ CRT_TXN0 CRT_TXP0 CRT_TXN1 CRT_TXP1E55 F55 E58 F58 F53 G53 F56 G56 C50 D50 C52 D52 A50 B50 D51 C51DDI1_TXN[0] DDI1_TXP[0] DDI1_TXN[1] DDI1_TXP[1] DDI1_TXN[2] DDI1_TXP[2] DDI1_TXN[3] DDI1_TXP[3] DDI2_TXN[0] DDI2_TXP[0] DDI2_TXN[1] DDI2_TXP[1] DDI2_TXN[2] DDI2_TXP[2] DDI2_TXN[3] DDI2_TXP[3]DDI EDPEDP_TXN[0] EDP_TXP[0] EDP_TXN[1] EDP_TXP[1] EDP_TXN[2] EDP_TXP[2] EDP_TXN[3] EDP_TXP[3] EDP_AUXN EDP_AUXP EDP_DISP_UTIL DDI1_AUXN DDI1_AUXP DDI2_AUXN DDI2_AUXP DDI3_AUXN DDI3_AUXPHDMIEDP_TXN0 EDP_TXP0 EDP_TXN1 EDP_TXP1(21) (21) (21) (21)eDP PanelCRT_AUXN CRT_AUXP R533 R532 *100K_4 *100K_4+3VCRT(20) (20) (20) (20)EDP_AUXN EDP_AUXP DP_UTIL R546 R553 C671 C670EDP_AUXN EDP_AUXP *0_4 *0_4 *short_4 *short_4(21) (21)PCH_BRIGHT +3V CRT_AUXN CRT_AUXP (20) (20)ITE FAE suggest CAP should be at PCH side.DISPLAY SIDEBANDSG50 F50 E48 CRT_AUX#_C F48 CRT_AUX_C G46 F46 L9 L7 L6 N9 L10 R12 R11 U13(22) (22)HDMI_DDCCLK_SW HDMI_DDCDATA_SWHDMI_DDCCLK_SW HDMI_DDCDATA_SW CRT_CLK CRT_DATAL13 L12 N7 N8 N11 N12GPP_E18/DDPB_CTRLCLK GPP_E19/DDPB_CTRLDATA GPP_E20/DDPC_CTRLCLK GPP_E21/DDPC_CTRLDATA GPP_E22/DDPD_CTRLCLK GPP_E23/DDPD_CTRLDATA EDP_RCOMP+3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5Rev:D change to shortpad*short_4 *short_4 INT_HDMI_HPD CRT_HPD (20) KBSMI# (29) EC_SCI# (29) EDP_HPD (21) PCH_BLON PCH_BRIGHT EDP_VDD_EN (21) (21) (21) (22)+3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5GPP_E13/DDPB_HPD0 GPP_E14/DDPC_HPD1 GPP_E15/DDPD_HPD2 GPP_E16/DDPE_HPD3 GPP_E17/EDP_HPD EDP_BKLTEN EDP_BKLTCTL EDP_VDDENINT_HDMI_HPD CRT_HPD R567 R571 EDP_HPD PCH_BLON PCH_BRIGHT PCH_VDDENCRT_CLK CRT_DATA KBSMI# EC_SCI#R577 R152 R780 R7812.2K_4 2.2K_4 20K/F_4 20K/F_4Rev:D add(25) +VCCIOPCH_ODD_EN 24.9/F_4 R154 EDP_RCOMPE52CeDP_RCOMP Trace length & 100 mils Trace width = 20 mils Trace spacing = 25 mils+1V_VCCST1 OF 20 SKL_ULT/BGA REV = 1 ?CRT_HPD EDP_HPDR564 R563100K_4 100K_4C100k pull-down on PCH side1K_4 49.9/F_4 R529 R788 CPU_THRMTRIP# CATERR#Rev:E Stuff only for C2 build Debug Ramp will remove(29,30,36)H_PECI (50ohm) Route on microstrip only Spacing &18 mils Trace Length: 0.4~6.125 iches(29) H_PROCHOT# H_PECI R531 R530 TP65 499/F_4 100/F_4 H_PROCHOT# THRMTRIP# CATERR# H_PECI H_PROCHOT#_R CPU_THRMTRIP# XDP_BPM#0 XDP_BPM#1 XDP_BPM#2 XDP_BPM#3 D63 A54 C65 C63 A65 C55 D55 B54 C56 A6 A7 BA5 AY5 AT16 AU16 H66 H65U35D CATERR# PECI PROCHOT# THERMTRIP# SKTOCC#SKL_ULTJTAGAvoid 125Mhz+VCCIOCPU MISCR4651K_4H_PROCHOT#BPM#[0:7] Trace Length 1~6 inches Length match & 300 milsTP89 TP90 TP64 TP62BPM#[0] BPM#[1] BPM#[2] BPM#[3] GPP_E3/CPU_GP0 GPP_E7/CPU_GP1 GPP_B3/CPU_GP2 GPP_B4/CPU_GP3 PROC_POPIRCOMP PCH_OPIRCOMP OPCE_RCOMP OPC_RCOMP 4 OF 20 SKL_ULT/BGA REV = 1PROC_TCK PROC_TDI PROC_TDO PROC_TMS PROC_TRST# PCH_JTAG_TCK PCH_JTAG_TDI PCH_JTAG_TDO PCH_JTAG_TMS PCH_TRST# JTAGXB61 D60 A61 C60 B59 B56 D59 A56 C59 C61 A59XDP_TCK0 XDP_TDI_CPU XDP_TDO_CPU XDP_TMS_CPU XDP_TRST# XDP_TCK1 XDP_TDI PCH _JTAG_TDO XDP_TMS PCH_TRST# R549 PCH_JTAGX R517PCH JTAGR539 *short_4 *short_4 *short_4 XDP_TDO XDP_TRST# XDP_TCK0MP remove(Intel) Change to +1V_VCCST 11/6+1V_VCCST(4)DGPU_PW_CTRL#DGPU_PW_CTRL# R635 R646 R158 R162 49.9/F_4 49.9/F_4 49.9/F_4 49.9/F_4+3V_S5 +3V_S5 +3V_S5 +3V_S5JTAG_TCK,JTAG_TMS Trace Length & 9000milsTCK,TMS Trace Length & 9000milsSM_RCOMP[0:2] Trace length & 500 mils Trace width = 12~15 mils Trace spacing = 20 milsRev:D change to shortpad?XDP_TDO_CPU XDP_TMS XDP_TDI PCH _JTAG_TDO PCH_JTAGXR559 R514 R515 R538 R51351_4 51_4 51_4 51_4 *1K_4BBXDP_TDO XDP_TDI XDP_TMSR795 R796 R7970_4 0_4 0_4XDP_TDO_CPU XDP_TDI_CPU XDP_TMS_CPUH_PWRGOOD (50ohm) Trace Length: 1~11.25 inchesXDP_TRST# XDP_TCK0 XDP_TCK1 PCH_TRST#R535 R558 R537 R534*51_4 51_4 *51_4 51_4If use Intel DCI USB 3.0 fixture need to short 1. XDP_TDO &--& XDP_TDO_CPU 2. XDP_TDI &--& XDP_TDI_CPU Rev:F 3. XDP_TMS &--& XDP_TMS_CPU2/16 ,XDP_TCK1,XDP_TMS don't need pull up or pull down 5/29 XDP_TCK0 R558 Stuffadd+1V_VCCSTCPU thermal tripIMVP_PWRGD_3V U33 1 2 3 NC A GND Y VCC 5 1 C628 0.1u/16V_4 4 R485 10K_4 +1V_VCCST R74 1K_4 IMVP_PWRGD_3V (8) R488 *1K_4 74AUP1G07GW THRMTRIP# R478 *0_4 1 Q5 3 MMBT3904-7-F SYS_SHDN# (31,40) 2A23Q31 FDV301N 1+1V_VCCST+3V(36)AIMVP_PWRGD2Quanta Computer Inc.PROJECT : ZRWSize Date:5 4 3 2Document NumberSkylake 1/4 (DDI/eDP)Monday, July 20, 20151Rev 3A 2 of 48Sheet54Laptopblue32103SKL ULT (DDR3L)U35CSKL_ULT DChange Data and DQS to interleave.SKL ULT (DDR3L)? U35BD SKL_ULT?CB(12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12)M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63M_A_DQ0 AL71 M_A_DQ1 AL68 M_A_DQ2 AN68 M_A_DQ3 AN69 M_A_DQ4 AL70 M_A_DQ5 AL69 M_A_DQ6 AN70 M_A_DQ7 AN71 M_A_DQ8 AR70 M_A_DQ9 AR68 M_A_DQ10 AU71 M_A_DQ11 AU68 M_A_DQ12 AR71 M_A_DQ13 AR69 M_A_DQ14 AU70 M_A_DQ15 AU69 M_A_DQ16 BB65 M_A_DQ17 AW65 M_A_DQ18 AW63 M_A_DQ19 AY63 M_A_DQ20 BA65 M_A_DQ21 AY65 M_A_DQ22 BA63 M_A_DQ23 BB63 M_A_DQ24 BA61 M_A_DQ25 AW61 M_A_DQ26 BB59 M_A_DQ27 AW59 M_A_DQ28 BB61 M_A_DQ29 AY61 M_A_DQ30 BA59 M_A_DQ31 AY59 M_A_DQ32 AY39 M_A_DQ33 AW39 M_A_DQ34 AY37 M_A_DQ35 AW37 M_A_DQ36 BB39 M_A_DQ37 BA39 M_A_DQ38 BA37 M_A_DQ39 BB37 M_A_DQ40 AY35 M_A_DQ41 AW35 M_A_DQ42 AY33 M_A_DQ43 AW33 M_A_DQ44 BB35 M_A_DQ45 BA35 M_A_DQ46 BA33 M_A_DQ47 BB33 M_A_DQ48 AY31 M_A_DQ49 AW31 M_A_DQ50 AY29 M_A_DQ51 AW29 M_A_DQ52 BB31 M_A_DQ53 BA31 M_A_DQ54 BA29 M_A_DQ55 BB29 M_A_DQ56 AY27 M_A_DQ57 AW27 M_A_DQ58 AY25 M_A_DQ59 AW25 M_A_DQ60 BB27 M_A_DQ61 BA27 M_A_DQ62 BA25 M_A_DQ63 BB25DDR0_DQ[0] DDR0_DQ[1] DDR0_DQ[2] DDR0_DQ[3] DDR0_DQ[4] DDR0_DQ[5] DDR0_DQ[6] DDR0_DQ[7] DDR0_DQ[8] DDR0_DQ[9] DDR0_DQ[10] DDR0_DQ[11] DDR0_DQ[12] DDR0_DQ[13] DDR0_DQ[14] DDR0_DQ[15] DDR0_DQ[16]/DDR0_DQ[32] DDR0_DQ[17]/DDR0_DQ[33] DDR0_DQ[18]/DDR0_DQ[34] DDR0_DQ[19]/DDR0_DQ[35] DDR0_DQ[20]/DDR0_DQ[36] DDR0_DQ[21]/DDR0_DQ[37] DDR0_DQ[22]/DDR0_DQ[38] DDR0_DQ[23]/DDR0_DQ[39] DDR0_DQ[24]/DDR0_DQ[40] DDR0_DQ[25]/DDR0_DQ[41] DDR0_DQ[26]/DDR0_DQ[42] DDR0_DQ[27]/DDR0_DQ[43] DDR0_DQ[28]/DDR0_DQ[44] DDR0_DQ[29]/DDR0_DQ[45] DDR0_DQ[30]/DDR0_DQ[46] DDR0_DQ[31]/DDR0_DQ[47] DDR0_DQ[32]/DDR1_DQ[0] DDR0_DQ[33]/DDR1_DQ[1] DDR0_DQ[34]/DDR1_DQ[2] DDR0_DQ[35]/DDR1_DQ[3] DDR0_DQ[36]/DDR1_DQ[4] DDR0_DQ[37]/DDR1_DQ[5] DDR0_DQ[38]/DDR1_DQ[6] DDR0_DQ[39]/DDR1_DQ[7] DDR0_DQ[40]/DDR1_DQ[8] DDR0_DQ[41]/DDR1_DQ[9] DDR0_DQ[42]/DDR1_DQ[10] DDR0_DQ[43]/DDR1_DQ[11] DDR0_DQ[44]/DDR1_DQ[12] DDR0_DQ[45]/DDR1_DQ[13] DDR0_DQ[46]/DDR1_DQ[14] DDR0_DQ[47]/DDR1_DQ[15] DDR0_DQ[48]/DDR1_DQ[32] DDR0_DQ[49]/DDR1_DQ[33] DDR0_DQ[50]/DDR1_DQ[34] DDR0_DQ[51]/DDR1_DQ[35] DDR0_DQ[52]/DDR1_DQ[36] DDR0_DQ[53]/DDR1_DQ[37] DDR0_DQ[54]/DDR1_DQ[38] DDR0_DQ[55]/DDR1_DQ[39] DDR0_DQ[56]/DDR1_DQ[40] DDR0_DQ[57]/DDR1_DQ[41] DDR0_DQ[58]/DDR1_DQ[42] DDR0_DQ[59]/DDR1_DQ[43] DDR0_DQ[60]/DDR1_DQ[44] DDR0_DQ[61]/DDR1_DQ[45] DDR0_DQ[62]/DDR1_DQ[46] DDR0_DQ[63]/DDR1_DQ[47]SKL_ULT/BGA REV = 1DDR0_CKN[0] DDR0_CKP[0] DDR0_CKN[1] DDR0_CKP[1] DDR0_CKE[0] DDR0_CKE[1] DDR0_CKE[2] DDR0_CKE[3] DDR0_CS#[0] DDR0_CS#[1] DDR0_ODT[0] DDR0_ODT[1] DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7] DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11] DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1] DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13] DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15] DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14] DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16] DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0] DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2] DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10] DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0] DDR0_MA[3] DDR0_MA[4] DDR0_DQSN[0] DDR0_DQSP[0] DDR0_DQSN[1] DDR0_DQSP[1] DDR0_DQSN[2]/DDR0_DQSN[4] DDR0_DQSP[2]/DDR0_DQSP[4] DDR0_DQSN[3]/DDR0_DQSN[5] DDR0_DQSP[3]/DDR0_DQSP[5] DDR0_DQSN[4]/DDR1_DQSN[0] DDR0_DQSP[4]/DDR1_DQSP[0] DDR0_DQSN[5]/DDR1_DQSN[1] DDR0_DQSP[5]/DDR1_DQSP[1] DDR0_DQSN[6]/DDR1_DQSN[4] DDR0_DQSP[6]/DDR1_DQSP[4] DDR0_DQSN[7]/DDR1_DQSN[5] DDR0_DQSP[7]/DDR1_DQSP[5] DDR0_ALERT# DDR0_PAR DDR_VREF_CA DDR0_VREF_DQ DDR1_VREF_DQ DDR_VTT_CNTL2 OF 20 ?AU53 AT53 AU55 AT55 BA56 BB56 AW56 AY56 AU45 AU43 AT45 AT43M_A_CLK0# M_A_CLK0 M_A_CLK1# M_A_CLK1 M_A_CKE0 M_A_CKE1(12) (12) (12) (12) (12) (12)M_A_ODT0 M_A_ODT1M_A_CS#0 (12) M_A_CS#1 (12) M_A_ODT0_DIMM M_A_ODT1_DIMM(12) (12)BA51 M_A_A5 BB54 M_A_A9 BA52 M_A_A6 AY52 M_A_A8 AW52M_A_A7 AY55 AW54M_A_A12 BA54 M_A_A11 BA55 M_A_A15 AY54 M_A_A14 AU46 M_A_A13 AU48 AT46 AU50 AU52 AY51 M_A_A2 AT48 AT50 M_A_A10 BB50 M_A_A1 AY50 M_A_A0 BA50 M_A_A3 BB52 M_A_A4 AM70 AM69 AT69 AT70 BA64 AY64 AY60 BA60 BA38 AY38 AY34 BA34 BA30 AY30 AY26 BA26 AW50 AT52 AY67 AY68 BA67 AW67M_A_DQS#0 M_A_DQS0 M_A_DQS#1 M_A_DQS1 M_A_DQS#2 M_A_DQS2 M_A_DQS#3 M_A_DQS3 M_A_DQS#4 M_A_DQS4 M_A_DQS#5 M_A_DQS5 M_A_DQS#6 M_A_DQS6 M_A_DQS#7 M_A_DQS7 DDR0_ALERT# TP_DDR0_PARITY# +VREF_CA_CPU +VREFDQ_SA_M3 +VREFDQ_SB_M3 DDR_VTT_CTRLM_A_BS#2(12)M_A_CAS# M_A_WE# M_A_RAS# M_A_BS#0 M_A_BS#1(12) (12) (12) (12) (12)M_A_DQS#0 M_A_DQS0 M_A_DQS#1 M_A_DQS1 M_A_DQS#2 M_A_DQS2 M_A_DQS#3 M_A_DQS3 M_A_DQS#4 M_A_DQS4 M_A_DQS#5 M_A_DQS5 M_A_DQS#6 M_A_DQS6 M_A_DQS#7 M_A_DQS7(12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12) (12)TP21DDR CH - A+3V_S5 +1.35VSUS(13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13)M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63AF65 AF64 AK65 AK64 AF66 AF67 AK67 AK66 AF70 AF68 AH71 AH68 AF71 AF69 AH70 AH69 AT66 AU66 AP65 AN65 AN66 AP66 AT65 AU65 AT61 AU61 AP60 AN60 AN61 AP61 AT60 AU60 AU40 AT40 AT37 AU37 AR40 AP40 AP37 AR37 AT33 AU33 AU30 AT30 AR33 AP33 AR30 AP30 AU27 AT27 AT25 AU25 AP27 AN27 AN25 AP25 AT22 AU22 AU21 AT21 AN22 AP22 AP21 AN21DDR1_DQ[0]/DDR0_DQ[16] DDR1_DQ[1]/DDR0_DQ[17] DDR1_DQ[2]/DDR0_DQ[18] DDR1_DQ[3]/DDR0_DQ[19] DDR1_DQ[4]/DDR0_DQ[20] DDR1_DQ[5]/DDR0_DQ[21] DDR1_DQ[6]/DDR0_DQ[22] DDR1_DQ[7]/DDR0_DQ[23] DDR1_DQ[8]/DDR0_DQ[24] DDR1_DQ[9]/DDR0_DQ[25] DDR1_DQ[10]/DDR0_DQ[26] DDR1_DQ[11]/DDR0_DQ[27] DDR1_DQ[12]/DDR0_DQ[28] DDR1_DQ[13]/DDR0_DQ[29] DDR1_DQ[14]/DDR0_DQ[30] DDR1_DQ[15]/DDR0_DQ[31] DDR1_DQ[16]/DDR0_DQ[48] DDR1_DQ[17]/DDR0_DQ[49] DDR1_DQ[18]/DDR0_DQ[50] DDR1_DQ[19]/DDR0_DQ[51] DDR1_DQ[20]/DDR0_DQ[52] DDR1_DQ[21]/DDR0_DQ[53] DDR1_DQ[22]/DDR0_DQ[54] DDR1_DQ[23]/DDR0_DQ[55] DDR1_DQ[24]/DDR0_DQ[56] DDR1_DQ[25]/DDR0_DQ[57] DDR1_DQ[26]/DDR0_DQ[58] DDR1_DQ[27]/DDR0_DQ[59] DDR1_DQ[28]/DDR0_DQ[60] DDR1_DQ[29]/DDR0_DQ[61] DDR1_DQ[30]/DDR0_DQ[62] DDR1_DQ[31]/DDR0_DQ[63] DDR1_DQ[32]/DDR1_DQ[16] DDR1_DQ[33]/DDR1_DQ[17] DDR1_DQ[34]/DDR1_DQ[18] DDR1_DQ[35]/DDR1_DQ[19] DDR1_DQ[36]/DDR1_DQ[20] DDR1_DQ[37]/DDR1_DQ[21] DDR1_DQ[38]/DDR1_DQ[22] DDR1_DQ[39]/DDR1_DQ[23] DDR1_DQ[40]/DDR1_DQ[24] DDR1_DQ[41]/DDR1_DQ[25] DDR1_DQ[42]/DDR1_DQ[26] DDR1_DQ[43]/DDR1_DQ[27] DDR1_DQ[44]/DDR1_DQ[28] DDR1_DQ[45]/DDR1_DQ[29] DDR1_DQ[46]/DDR1_DQ[30] DDR1_DQ[47]/DDR1_DQ[31] DDR1_DQ[48] DDR1_DQ[49] DDR1_DQ[50] DDR1_DQ[51] DDR1_DQ[52] DDR1_DQ[53] DDR1_DQ[54] DDR1_DQ[55] DDR1_DQ[56] DDR1_DQ[57] DDR1_DQ[58] DDR1_DQ[59] DDR1_DQ[60] DDR1_DQ[61] DDR1_DQ[62] DDR1_DQ[63]SKL_ULT/BGA REV = 1 M_A_A[15:0]DDR1_CKN[0] DDR1_CKN[1] DDR1_CKP[0] DDR1_CKP[1] DDR1_CKE[0] DDR1_CKE[1] DDR1_CKE[2] DDR1_CKE[3] DDR1_CS#[0] DDR1_CS#[1] DDR1_ODT[0] DDR1_ODT[1] DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7] DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11] DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1] DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13] DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15] DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14] DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16] DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0] DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2] DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10] DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0] DDR1_MA[3] DDR1_MA[4] DDR1_DQSN[0]/DDR0_DQSN[2] DDR1_DQSP[0]/DDR0_DQSP[2] DDR1_DQSN[1]/DDR0_DQSN[3] DDR1_DQSP[1]/DDR0_DQSP[3] DDR1_DQSN[2]/DDR0_DQSN[6] DDR1_DQSP[2]/DDR0_DQSP[6] DDR1_DQSN[3]/DDR0_DQSN[7] DDR1_DQSP[3]/DDR0_DQSP[7] DDR1_DQSN[4]/DDR1_DQSN[2] DDR1_DQSP[4]/DDR1_DQSP[2] DDR1_DQSN[5]/DDR1_DQSN[3] DDR1_DQSP[5]/DDR1_DQSP[3] DDR1_DQSN[6] DDR1_DQSP[6] DDR1_DQSN[7] DDR1_DQSP[7] DDR1_ALERT# DDR1_PAR DRAM_RESET# DDR_RCOMP[0] DDR_RCOMP[1] DDR_RCOMP[2]DDR CH - BAN45 AN46 AP45 AP46 AN56 AP55 AN55 AP53 BB42 AY42 BA42 AW42M_B_CLK0# M_B_CLK1# M_B_CLK0 M_B_CLK1 M_B_CKE0 M_B_CKE1(13) (13) (13) (13) (13) (13)M_B_ODT0 M_B_ODT1M_B_CS#0 (13) M_B_CS#1 (13) M_B_ODT0_DIMM M_B_ODT1_DIMM(13) (13)AY48 M_B_A5 AP50 M_B_A9 BA48 M_B_A6 BB48 M_B_A8 AP48 M_B_A7 AP52 AN50 M_B_A12 AN48 M_B_A11 AN53 M_B_A15 AN52 M_B_A14 BA43 M_B_A13 AY43 AY44 AW44 BB44 AY47 M_B_A2 BA44 AW46M_B_A10 AY46 M_B_A1 BA46 M_B_A0 BB46 M_B_A3 BA47 M_B_A4 AH66 AH65 AG69 AG70 AR66 AR65 AR61 AR60 AT38 AR38 AT32 AR32 AR25 AR27 AR22 AR21 AN43 AP43 AT13 AR18 AT18 AU18M_B_DQS#0 M_B_DQS0 M_B_DQS#1 M_B_DQS1 M_B_DQS#2 M_B_DQS2 M_B_DQS#3 M_B_DQS3 M_B_DQS#4 M_B_DQS4 M_B_DQS#5 M_B_DQS5 M_B_DQS#6 M_B_DQS6 M_B_DQS#7 M_B_DQS7M_B_BS#2(13)M_B_CAS# M_B_WE# M_B_RAS# M_B_BS#0 M_B_BS#1(13) (13) (13) (13) (13)CM_B_DQS#0 M_B_DQS0 M_B_DQS#1 M_B_DQS1 M_B_DQS#2 M_B_DQS2 M_B_DQS#3 M_B_DQS3 M_B_DQS#4 M_B_DQS4 M_B_DQS#5 M_B_DQS5 M_B_DQS#6 M_B_DQS6 M_B_DQS#7 M_B_DQS7(13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13) (13)DDR1_ALERT# TP_DDR1_PARITY# CPU_DRAMRST# SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2TP18B3 OF 20 R682 *100K_42? M_B_A[15:0] M_A_A[15:0] (12) M_B_A[15:0] (13)R621*10K_413Q35 *DTC144EUDDR_VTTT_PG_CTRL(35) DDR0_ALERT# DDR1_ALERT#REV:E connect to GNDStuff Q54 for both UMA and GPU in DDR_VTT_CNTLDRAM COMPSM_RCOMP_0120/F_4 80.6/F_4 100/F_4R685 R678 R681DRAMRST+1.35VSUSSM_RCOMP_1 SM_RCOMP_2A1R679 470_4ACPUCPU_DRAMRST#DRAMR670 *short_4 DDR3_DRAMRST# (12,13)212C750 *0.1u/16V_4 Size Document NumberQuanta Computer Inc.PROJECT : ZRWSkylake 2/3 (DDR3 I/F)Date: Monday, July 20, 20151Rev 3A 3 of 48Sheet543254SKL ULT (SIDEBAND )H_PECI (50ohm) Route on microstrip only Spacing &18 mils Trace Length: 0.4~6.125 iches H_PWRGOOD (50ohm) Trace Length: 1~11.25 inchesDLaptopblue321GPIO04ISHU35FSKL_ULT LPSSAdd GPU Power Control Siganls(41) VGPU_EN DGPU_HOLD_RST# (42) DGPU_PWR_EN AN8 AP7 AP8 AR7 AM5 AN7 AP5 AN5 AB1 AB2 W4 AB3 AD1 AD2 AD3 AD4 U7 U6 U8 U9 AH9 AH10 AH11 AH12 AF11 AF12(14)GSPI0_MOSIGPP_B15/GSPI0_CS# GPP_B16/GSPI0_CLK GPP_B17/GSPI0_MISO GPP_B18/GSPI0_MOSI GPP_B19/GSPI1_CS# GPP_B20/GSPI1_CLK GPP_B21/GSPI1_MISO GPP_B22/GSPI1_MOSI GPP_C8/UART0_RXD GPP_C9/UART0_TXD GPP_C10/UART0_RTS# GPP_C11/UART0_CTS# GPP_C20/UART2_RXD GPP_C21/UART2_TXD GPP_C22/UART2_RTS# GPP_C23/UART2_CTS# GPP_C16/I2C0_SDA GPP_C17/I2C0_SCL GPP_C18/I2C1_SDA GPP_C19/I2C1_SCL GPP_F4/I2C2_SDA GPP_F5/I2C2_SCL GPP_F6/I2C3_SDA GPP_F7/I2C3_SCL GPP_F8/I2C4_SDA GPP_F9/I2C4_SCL SKL_ULT/BGA REV = 1+3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +1.8V_S5 +1.8V_S5 +1.8V_S5 +1.8V_S5 +1.8V_S5 +1.8V_S56 OF 20+3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +1.8V_S5 +1.8V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5GPP_D9 GPP_D10 GPP_D11 GPP_D12P2 P3 P4 P1 M4 N3 N1 N2 AD11 AD12 U1 U2 U3 U4 AC1 AC2 AC3 AB4 AY8 BA8 BB7 BA7 AY7 AW7 AP13 UART2_RXD UART2_TXD UART2_RTS# UART2_CTS#D+3V_S5(16) DGPU_PWROK (15,17) GC6_FB_EN (17) DGPU_EVENT# (27) ACCEL_INTA (25) ODD_PRSNT# (21) TP_INT_PCHGPP_D5/ISH_I2C0_SDA GPP_D6/ISH_I2C0_SCL GPP_D7/ISH_I2C1_SDA GPP_D8/ISH_I2C1_SCLGSPI1_MOSI2.2K_4 2.2K_4 *2.2K_4 *2.2K_4R167 R166 R165 R169I2C0_SDA I2C0_SCL I2C1_SDA I2C1_SCLTouch PAD Touch Screen UART2 for RMTTPD_INT#_D UART2_RXD UART2_TXD UART2_RTS# UART2_CTS# I2C0_SDA I2C0_SCL I2C1_SDA I2C1_SCLGPP_F10/I2C5_SDA/ISH_I2C2_SDA GPP_F11/I2C5_SCL/ISH_I2C2_SCLPU 2.2K for touch pad I2C bus(400 KHz)+3VGPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL GPP_D15/ISH_UART0_RTS# GPP_D16/ISH_UART0_CTS#/SML0BALERT# GPP_C12/UART1_RXD/ISH_UART1_RXD GPP_C13/UART1_TXD/ISH_UART1_TXD GPP_C14/UART1_RTS#/ISH_UART1_RTS# GPP_C15/UART1_CTS#/ISH_UART1_CTS#Reserve UART FFC connector for Win 7 debug+3V_S5GPU Control PU/PD Touch PAD*EV@10K_4 *10K_4 *10K_4 R220 R257 R204 VGPU_EN DGPU_PWR_EN GC6_FB_EN *IV@10K_4 *100K_4 *10K_4 R196 R256 R199 (27) (27) (21) (21) I2C0_SDA I2C0_SCL I2C1_SDA I2C1_SCLUART2_RXD UART2_TXD UART2_RTS# UART2_CTS#R275 R280 R283 R290*49.9K/F_4 *49.9K/F_4 *49.9K/F_4 *49.9K/F_4Touch Screen1A-1
For GC6 NV DG GC6_FB_EN PD.+3V+3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5GPP_A18/ISH_GP0 GPP_A19/ISH_GP1 GPP_A20/ISH_GP2 GPP_A21/ISH_GP3 GPP_A22/ISH_GP4 GPP_A23/ISH_GP5 GPP_A12/BM_BUSY#/ISH_GP6+5V CN3 1 2 3 4 5 6R20810K_4DGPU_HOLD_RST#7 8?DGPU_PW_CTRL# UMA Only highC*UART FunctionClowGPU power is control by PCH GPIO (Discrete, SG or Optimize) +3VU35GSKL_ULTHDA(24) PCH_AZ_CODEC_SYNC (24) PCH_AZ_CODEC_BITCLK (24) PCH_AZ_CODEC_SDOUT (24) PCH_AZ_CODEC_SDIN0 (24) PCH_AZ_CODEC_RST#C742 R667 R644 R645 R660 C739 *10p/50V_4*10p/50V_4 33_4 33_4 33_4 33_4 HDA_SYNC_R HDA_BCLK_R HDA_SDO_R HDA_RST#_R BA22 AY22 BB22 BA21 AY21 AW22 J5 AY20 AW20 AK7 AK6 AK9 AK10 DMIC_CLK0_R DMIC_DATA0_R H5 D7 D8 C8 SPKR AW5AUDIO(2)DGPU_PW_CTRL# R127 EV@100K_4 DGPU_PW_CTRL# DGPU_PWROK R115 R110 IV@1K_4 *10K_4DGPU_PWROK PD on GPU sideHDA_SYNC/I2S0_SFRM HDA_BLK/I2S0_SCLK HDA_SDO/I2S0_TXD HDA_SDI0/I2S0_RXD HDA_SDI1/I2S1_RXD HDA_RST#/I2S1_SCLK GPP_D23/I2S_MCLK I2S1_SFRM I2S1_TXD GPP_F1/I2S2_SFRM GPP_F0/I2S2_SCLK GPP_F2/I2S2_TXD GPP_F3/I2S2_RXDSDIO/SDXC+3V_S5DGPU_PW_CTRL# UMA Only 1VGA H/W Signal UMASetup Menu Hidden UMA bootReserve connect to DMIC (acer request 1/14)(24) (24) DMIC_CLK0_L DMIC_DATA0_L R769 R770 *33_4 *33_4+1.8V_S5 +1.8V_S5 +1.8V_S5 +1.8V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5+3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5SD GPI SD GPI SD GPI SD GPI SD GPI SD GPI SD GPI SD GPIGPP_G0/SD_CMD GPP_G1/SD_DATA0 GPP_G2/SD_DATA1 GPP_G3/SD_DATA2 GPP_G4/SD_DATA3 GPP_G5/SD_CD# GPP_G6/SD_CLK GPP_G7/SD_WPAB11 AB13 AB12 W12 W11 W10 W8 W7 BA9 BB9 AB7 AF13 200/F_4 R174GPP_A17/SD_PWR_EN#/ISH_GP7 GPP_A16/SD_1P8_SEL SD_RCOMPSG/Optimise0GPUHiddenGPU bootGPP_D19/DMIC_CLK0 GPP_D20/DMIC_DATA0 GPP_D17/DMIC_CLK1 GPP_D18/DMIC_DATA1 GPP_B14/SPKRStrappingSPKR R624 *20K_4 (24) SPKR+1.8V_S5GPP_F23+3V_S57 OF 20Skylake-U Strapping TablePin NameBSKL_ULT/BGAREV = 1Touchpad INT? TPD_INT#_D TDI@100K_4+3V_S5Strap descriptionTop-Block Swap override No reboot TLS Confidentiality Boot BIOS Strap Bit (BBS) eSPI or LPC Reserved ReservedSampled PCH_PWROK PCH_PWROK RSMRST# PCH_PWROK RSMRST# RSMRST# RSMRST#Configuration0 = *Disable Top Swap (iPD 20K) 1 = Enable Top Swap Mode 0 = *Disable No Reboot (iPD 20K) 1 = Enable No Reboot Mode 0 = *Disable Intel ME Cryp to TLS(iPD 20K) 1 = Enable Intel ME Cryp to TLS 0 = *SPI (iPD 20K) 1 = LPC 0 = *LPC is selected for EC (iPD 20K) 1 = eSPI selected for EC (iPU 15 ~ 40K) (iPU 15 ~ 40K)+3V_S5 +3V +3V_S5 +3V +3V R625note*1K_4 SPKRR177BGPP_B14 (SPKR) GPP_B18 (GSPI0_MOSI) GPP_C2 (SMBALERT#) GPP_B22 (GSPI1_MOSI) GPP_C5 (SML0ALERT#) SPI0_MOSI SPI0_MISO GPP_B23 (SML1ALERT# /PCHHOT#) SPI0_IO2R619*1K_4GSPI0_MOSI+3VS5R160 *10K_4 SMBALERT# (7) (27,29) TPD_INT# 1S53 TPD_INT#_DQ20 TDI@2N7002K R207 *1K_4 GSPI1_MOSI R164 R586 *1K_4 *0_4SML0ALERT#(7)ReservedRSMRST#(iPD 20K)Reserved ReservedFlash Descriptor Security Override / Intel ME Debug ModeRSMRST# RSMRST#(iPU 15 ~ 40K) (iPU 15 ~ 40K) 0 = *Enable security in the Flash Description (iPD 20K) 1 = Disable Flash Descriptor Security (Override) 0 = *Port B is not detected (iPD 20K) 1 =Port B is detected 0 = *Port C is not detected (iPD 20K) 1 =Port C is detected4 3 2 AASPI0_IO3 HDA_SDO / I2S_TXD0 GPP_E19 (DDPB_CTRLDATA) GPP_E21 (DDPC_CTRLDATA)PCH_PWROKchange location to near CPU to prevent impact HDA_SDO signalHDA_SDO_R R737 1K_4 ME_WR# (29)Display Port B DetectedPCH_PWROKQuanta Computer Inc.PROJECT : ZRWSize Date: Document Number2Display Port C Detected5PCH_PWROKSkylake 6/7 (PEG/DMI/FDI)Monday, July 20, 20151Rev 3A of 48Sheet4543+VCCCORE U35LSKL_ULT?Backside capC184 1U/6.3V_2 C243 22u/6.3V_6 C233 22u/6.3V_6 C226 22u/6.3V_6 C203 22u/6.3V_6 C219 22u/6.3V_6 C224 22u/6.3V_6 C236 22u/6.3V_6 C255 22u/6.3V_6 C251 22u/6.3V_6CPU POWER 1 OF 4Backside capC214 1U/6.3V_2 C245 1U/6.3V_2 C676 10u/6.3V_4 C258 10u/6.3V_4 C259 10u/6.3V_4 C647 10u/6.3V_4 C651 10u/6.3V_4 C657 10u/6.3V_4 C257 10u/6.3V_4DBackside capC189 C273 22u/6.3V_6 C272 22u/6.3V_6 C282 22u/6.3V_6 C289 22u/6.3V_6 1U/6.3V_2 C252 1U/6.3V_2 C222 1U/6.3V_2 C235 TP12 1U/6.3V_2 TP20A30 A34 A39 A44 AK33 AK35 AK37 AK38 AK40 AL33 AL37 AL40 AM32 AM33 AM35 AM37 AM38 G30 K32 AK32 AB62 P62 V62 H63 G61 AC63 AE63 AE62 AG62 AL63 AJ62VCC_A30 VCC_A34 VCC_A39 VCC_A44 VCC_AK33 VCC_AK35 VCC_AK37 VCC_AK38 VCC_AK40 VCC_AL33 VCC_AL37 VCC_AL40 VCC_AM32 VCC_AM33 VCC_AM35 VCC_AM37 VCC_AM38 VCC_G30 RSVD_K32 RSVD_AK32Laptopblue+VCCCORE21S0VCC 0.55V~1.5V2+2 peak 24A 2+2 TPY 17A 2+3e peak 24A 2+3e TPY 17AVCC_G32 VCC_G33 VCC_G35 VCC_G37 VCC_G38 VCC_G40 VCC_G42 VCC_J30 VCC_J33 VCC_J37 VCC_J40 VCC_K33 VCC_K35 VCC_K37 VCC_K38 VCC_K40 VCC_K42 VCC_K43G32 G33 G35 G37 G38 G40 G42 J30 J33 J37 J40 K33 K35 K37 K38 K40 K42 K43 E32 E33 B63 A63 D64 G20Primary side capC645 47u/6.3V_8 C144 47u/6.3V_8 C650 47u/6.3V_8 C659 47u/6.3V_8 C150 47u/6.3V_8C666 47u/6.3V_805C663 10u/6.3V_4 C678 10u/6.3V_4DPrimary side capC679 10u/6.3V_4 C667 10u/6.3V_4 C674 10u/6.3V_4 C664 10u/6.3V_4 C673 10u/6.3V_4 C675 10u/6.3V_4R96+VCCCORE 100/F_4 100ohm Near CPUVCORE_SENSE (36) VCORESS_SENSE (36)VCC_SENSE VSS_SENSER98100/F_4 H_CPU_SVIDART# H_CPU_SVIDCLK H_CPU_SVIDDAT +VCCSTGSVID+1V_VCCSTLayout note: need routing together and ALERT need between CLK and DATA.C814 C815 C816 C817 C818 C819
* * * * *Backside capC212 1U/6.3V_2 C196 1U/6.3V_2 C201 1U/6.3V_2 C262 1U/6.3V_2 C215 1U/6.3V_2 C227 C246 1U/6.3V_2 1U/6.3V_2 +1.8V_PRIM+VCCOPCFor 2+3e CPU+1.8V_PRIM R172 R634 R636 R176 C200 1U/6.3V_2 1U/6.3V_2 1U/6.3V_2 1U/6.3V_2 1U/6.3V_2 1U/6.3V_2 1U/6.3V_2 +VCCEOPIO GT3@100/F_4 GT3@0_4 GT3@0_4 GT3@100/F_4VCCOPC_AB62S0 VCCOPC_P62 VCCOPC_V62 VCC_OPC_1P8_H63 VCC_OPC_1P8_G61 VCCOPC_SENSE VSSOPC_SENSE VCCEOPIO VCCEOPIO1.0V 3AVIDALERT# VIDSCK VIDSOUT VCCSTG_G20R138 100/F_4+VCCOPC (33) +VCCOPC_SRC (33) 681_AGNDSx 1.8V 50mAC174 H_CPU_SVIDDAT 1U/6.3V_4 H_CPU_SVIDDAT (36)Backside capC181 C228 C269 C237 C209 C285GT3 CPUPlace PU resistor close to CPU+1V_VCCSTREV:F add 1000pS0 1.0V 3AFor 2+3e CPU 100 ohm near CPU+VCCEOPIO C708 GT3@10u/6.3V_4VCCEOPIO_SENSE VSSEOPIO_SENSE12 OF 20 SKL_ULT/BGA REV =1 U35MSKL_ULTPlace PU resistor close to CPUH_CPU_SVIDART# ? R552 220_4R134 54.9/F_4 VR_SVID_ALERT#_VCORE (36)Backside capC709 GT3@10u/6.3V_4+VCCOPC_SRC 681_AGNDR633 R632GT3@0_4 GT3@0_4For 2+3e CPU?+VCCGTH_CPU_SVIDCLKH_CPU_SVIDCLK(36)CPU POWER 2 OF 4Backside cap+1.8V_PRIM C687 GT3@10u/6.3V_41.0V_CPU 3A+VCCOPC C681 C685 C683 C689Backside capC686 GT3@10u/6.3V_4C688C684For 2+3e CPUC682 GT3@1U/6.3V_2 GT3@1U/6.3V_2 GT3@1U/6.3V_2 GT3@1U/6.3V_2 GT3@1U/6.3V_2 GT3@1U/6.3V_2 GT3@10u/6.3V_4For 2+3e CPUCR565 +1.8V_S5 GT3@0_6 +1.8V_PRIMBackside capC186 10u/6.3V_4 C185 10u/6.3V_4 C155 10u/6.3V_4 C158 10u/6.3V_4 C232 10u/6.3V_4 C218 10u/6.3V_4 C151 10u/6.3V_4 C161 10u/6.3V_4+VCCGTC223 10u/6.3V_4C148 10u/6.3V_4Backside capC197 1U/6.3V_2 C194 1U/6.3V_2 C193 1U/6.3V_2 C188 1U/6.3V_2 C241 1U/6.3V_2 C240 1U/6.3V_2 C239 1U/6.3V_2 C198 1U/6.3V_2 C204 1U/6.3V_2 C206 1U/6.3V_2C205 1U/6.3V_2C195 1U/6.3V_2+VCCGT100 ohm Near CPUBR155 100/F_4A48 A53 A58 A62 A66 AA63 AA64 AA66 AA67 AA69 AA70 AA71 AC64 AC65 AC66 AC67 AC68 AC69 AC70 AC71 J43 J45 J46 J48 J50 J52 J53 J55 J56 J58 J60 K48 K50 K52 K53 K55 K56 K58 K60 L62 L63 L64 L65 L66 L67 L68 L69 L70 L71 M62 N63 N64 N66 N67 N69 J70 J69VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGTS0VCCGT 0.55~1.5V2+2 peak 31A 2+2 TPY 15A 2+3e peak 56A 2+3e TPY 17AVCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGTN70 N71 R63 R64 R65 R66 R67 R68 R69 R70 R71 T62 U65 U68 U71 W63 W64 W65 W66 W67 W68 W69 W70 W71 Y62 AK42 AK43 AK45 AK46 AK48 AK50 AK52 AK53 AK55 AK56 AK58 AK60 AK70 AL43 AL46 AL50 AL53 AL56 AL60 AM48 AM50 AM52 AM53 AM56 AM58 AU58 AU63 BB57 BB66 AK62 AL61Primary side capC199 47u/6.3V_8 C190 47u/6.3V_8 C702 47u/6.3V_8 C690 47u/6.3V_8 C248 47u/6.3V_8 C697 47u/6.3V_8 C696 47u/6.3V_8Primary side capC693 22u/6.3V_6 C705 22u/6.3V_6 C178 22u/6.3V_6 C706 22u/6.3V_6 C171 22u/6.3V_6 C707 22u/6.3V_6 C210 47u/6.3V_6CPrimary side capC692 22u/6.3V_6 C704 22u/6.3V_6 C202 47u/6.3V_6 C694 22u/6.3V_6 C691 22u/6.3V_6E3A C210 change to 47u/6.3v_6C703 22u/6.3V_6E3A C202 change to 47u/6.3v_6+VCCGTS0 VCCGTX 0.55~1.5VPrimary side capC302 C307 C274 GT3@22u/6.3V_6 GT3@22u/6.3V_6 22u/6.3V_6 C275 22u/6.3V_6 C276 GT3@22u/6.3V_6VCCGTX_AK42 VCCGTX_AK43 2+2 X VCCGTX_AK45 VCCGTX_AK46 2+3e peak 6A VCCGTX_AK48 2+3e TPY 4A VCCGTX_AK50 VCCGTX_AK52 VCCGTX_AK53 VCCGTX_AK55 VCCGTX_AK56 VCCGTX_AK58 VCCGTX_AK60 VCCGTX_AK70 VCCGTX_AL43 VCCGTX_AL46 VCCGTX_AL50 VCCGTX_AL53 VCCGTX_AL56 VCCGTX_AL60 VCCGTX_AM48 VCCGTX_AM50 VCCGTX_AM52 VCCGTX_AM53 VCCGTX_AM56 VCCGTX_AM58 VCCGTX_AU58 VCCGTX_AU63 VCCGTX_BB57 VCCGTX_BB66 VCCGTX_SENSE VSSGTX_SENSE13 OF 20C303 C310 C277 GT3@22u/6.3V_6 GT3@22u/6.3V_6 22u/6.3V_6REV:F Stuff C277,C274,C275For 2+3e CPUBackside capC291 C279 C281 C324 C316 C280 C290 C317 GT3@10u/6.3V_4 GT3@10u/6.3V_4 GT3@10u/6.3V_4 GT3@10u/6.3V_4 GT3@10u/6.3V_4 GT3@10u/6.3V_4 GT3@10u/6.3V_4 GT3@10u/6.3V_4B(36) (36)VCCGT_SENSE VSSGT_SENSE R161 100/F_4 +1.35VSUSVCCGT_SENSE VSSGT_SENSESKL_ULT/BGA REV = 1 U35NSKL_ULTTP86 TP87? ?Backside capC313 C318 10u/6.3V_4 C328 10u/6.3V_4 1U/6.3V_2 C308 1U/6.3V_2 C311 1U/6.3V_2 C312 1U/6.3V_2Primary side capC326 10u/6.3V_4 C323 10u/6.3V_4 +VDDQC +1.35VSUS R194 1 *short_4 2 C299 1U/6.3V_2 C286 10u/6.3V_4 C677 +1V_SUS R550 *short_6 1U/6.3V_4 +VCCSTG +1V_VCCST C325 10u/6.3V_4 C327 10u/6.3V_4AU23 AU28 AU35 AU42 BB23 BB32 BB41 BB47 BB51 AM40 A18 A22 AL23 K20 K21VDDQ_AU23 DDR3L VDDQ_AU28 1.35V VDDQ_AU35 VDDQ_AU42 2A VDDQ_BB23 VDDQ_BB32 VDDQ_BB41 VDDQ_BB47 S0 VDDQ_BB51 VDDQC VCCSTS3CPU POWER 3 OF 4S0 0.85V/0.95V3.0AVCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA+VCCIOAK28 AK30 AL30 AL42 AM28 AM30 AM42 AK23 AK25 G23 G25 G27 G28 J22 J23 J27 K23 K25 K27 K28 K30 AM23 AM22 H21 H20R109 100/F_4 TP17 TP14Backside capC266 C284 10u/6.3V_4 C283 10u/6.3V_4 1U/6.3V_2Imax 3(A)C297 1U/6.3V_2 C264 1U/6.3V_2 C298 1U/6.3V_22+2 peak 5A 2+2 TPY 4A 2+3e peak 5.1A 2+3e TPY 5A S3 1.0V 120mA1.15VPrimary side capC701 1U/6.3V_4 +VCCSA C710 1U/6.3V_4 C700 1U/6.3V_4 C711 1U/6.3V_41.0V 40mA S0 VCCPLL_OC S0 1.0V 260mAVCCSTG_A22 VCCPLL_K20 VCCPLL_K21Backside capC254 10u/6.3V_4 C238 10u/6.3V_4 C247 10u/6.3V_4 C229 10u/6.3V_4 C221 10u/6.3V_4 C263 10u/6.3V_4 C288 10u/6.3V_4Backside capS3 1.0V 120mAVCCIO_SENSE VSSIO_SENSE VSSSA_SENSE VCCSA_SENSESKL_ULT/BGA 14 OF 20 REV = 1 ?Backside capC207 1U/6.3V_2 C278 1U/6.3V_2 C216 1U/6.3V_2 C242 1U/6.3V_2 C260 1U/6.3V_2 C267 1U/6.3V_2 C249 1U/6.3V_2Rev:F change to ShortpadPrimary side capC176A+VCCIOR135*short_6VSASS_SENSE (36) VSA_SENSE (36) +VCCSA R122 100/F_4 C114 10u/6.3V_4 C643 10u/6.3V_4 C641 10u/6.3V_4 C165 10u/6.3V_4 C642 10u/6.3V_4 C157 10u/6.3V_4Rev:F change to Shortpad+1V_SUS R112 *short_6Backside cap1U/6.3V_4 +VCCPLLPrimary side capA100 ohm near CPUC172Rev:F change to ShortpadPrimary side cap1U/6.3V_4Quanta Computer Inc.PROJECT : ZRWSize Document NumberSkylake 12/13/14 (POWER)Date:5 4 3 2Rev 3A of 48Monday, July 20, 20151Sheet554Skylake ULT (GPU, SATA , ODD, CLK ,USB2&3)U35HSKL_ULTLaptopblue321?06PCH PU/PDMB USB3.0 CN16 ( Charger IC ) DownUSB_OC0# USB_OC1# USB_OC2# USB_OC3# R541 R540 R543 R542 10K_4 10K_4 10K_4 10K_4DPCIE/USB3/SATASSIC / USB3D(14) (14) (14) (14) (14) (14) (14) (14) (14) (14) (14) (14) (14) (14) (14) (14) (23) (23) (23) (23) (26) (26) (26) (26)PEG_RX#0 PEG_RX0 PEG_TX#0 PEG_TX0 PEG_RX#1 PEG_RX1 PEG_TX#1 PEG_TX1 PEG_RX#2 PEG_RX2 PEG_TX#2 PEG_TX2 PEG_RX#3 PEG_RX3 PEG_TX#3 PEG_TX3C653 C652EV@0.22u/10V_4 EV@0.22u/10V_4C_PEG_TX#0 C_PEG_TX0H13 G13 B17 A17 G11 F11 D16 C16 H16 G16 D17 C17 G15 F15 B19 A19 F16 E16 C19 D19 G18 F18 D20 C20 F20 E20 B21 A21 G21 F21 D21 C21 E22 E23 B23 A23 F25 E25 D23 C23PCIE1_RXN/USB3_5_RXN PCIE1_RXP/USB3_5_RXP PCIE1_TXN/USB3_5_TXN PCIE1_TXP/USB3_5_TXP PCIE2_RXN/USB3_6_RXN PCIE2_RXP/USB3_6_RXP PCIE2_TXN/USB3_6_TXN PCIE2_TXP/USB3_6_TXP PCIE3_RXN PCIE3_RXP PCIE3_TXN PCIE3_TXP PCIE4_RXN PCIE4_RXP PCIE4_TXN PCIE4_TXP PCIE5_RXN PCIE5_RXP PCIE5_TXN PCIE5_TXP PCIE6_RXN PCIE6_RXP PCIE6_TXN PCIE6_TXP PCIE7_RXN/SATA0_RXN PCIE7_RXP/SATA0_RXP PCIE7_TXN/SATA0_TXN PCIE7_TXP/SATA0_TXP PCIE8_RXN/SATA1A_RXN PCIE8_RXP/SATA1A_RXP PCIE8_TXN/SATA1A_TXN PCIE8_TXP/SATA1A_TXP PCIE9_RXN PCIE9_RXP PCIE9_TXN PCIE9_TXP PCIE10_RXN PCIE10_RXP PCIE10_TXN PCIE10_TXP PCIE_RCOMPN PCIE_RCOMPP PROC_PRDY# PROC_PREQ# GPP_A7/PIRQA#USB3_1_RXN USB3_1_RXP USB3_1_TXN USB3_1_TXP USB3_2_RXN/SSIC_1_RXN USB3_2_RXP/SSIC_1_RXP USB3_2_TXN/SSIC_1_TXN USB3_2_TXP/SSIC_1_TXP USB3_3_RXN/SSIC_2_RXN USB3_3_RXP/SSIC_2_RXP USB3_3_TXN/SSIC_2_TXN USB3_3_TXP/SSIC_2_TXP USB3_4_RXN USB3_4_RXP USB3_4_TXN USB3_4_TXP USB2N_1 USB2P_1 USB2N_2 USB2P_2 USB2N_3 USB2P_3 USB2N_4 USB2P_4 USB2N_5 USB2P_5 USB2N_6 USB2P_6 USB2N_7 USB2P_7 USB2N_8 USB2P_8 USB2N_9 USB2P_9 USB2N_10 USB2P_10 USB2_COMP USB2_ID USB2_VBUSSENSEH8 G8 C13 D13 J6 H6 B13 A13 J10 H10 B15 A15 E10 F10 C15 D15 AB9 AB10 AD6 AD7 AH3 AJ3 AD9 AD10 AJ1 AJ2 AF6 AF7 AH1 AH2 AF8 AF9 AG1 AG2 AH7 AH8 AB6 USBCOMP AG3 USB2_ID AG4 A9 C9 D9 B9 J1 J2 J3 H2 H3 G4 H1 USB_OC0# USB_OC1# USB_OC2# USB_OC3# SATA_DEVSLP0 SATA_DEVSLP1 SATA_DEVSLP2 SATAGP0 SATAGP1 SATAGP2USB3_RXN0 USB3_RXP0 USB3_TXN0 USB3_TXP0 USB3_RXN1 USB3_RXP1 USB3_TXN1 USB3_TXP1(28) (28) (28) (28) (28) (28) (28) (28)+3V_S5MB USB3.0 CN13 -& UpdGPU PEG*4C656 C655EV@0.22u/10V_4 EV@0.22u/10V_4C_PEG_TX#1 C_PEG_TX1+3VC661 C662EV@0.22u/10V_4 EV@0.22u/10V_4C_PEG_TX#2 C_PEG_TX21A-1USBP0USBP0+ USBP1USBP1+ (28) (28) (28) (28)C654 C660EV@0.22u/10V_4 EV@0.22u/10V_4C_PEG_TX#3 C_PEG_TX3SATA_DEVSLP0 SATA_DEVSLP1 SATA_DEVSLP2 PIRQA#R573 R574 R575 R631 R569 R566*10K_4 *10K_4 *10K_4 *10K_4 *10K_4 *10K_4MB USB3.0 CN16 ( Charger IC ) Down MB USB3.0 CN13 -& UpSATAGP1 SATAGP2LANPCIE_RX5-_LAN PCIE_RX5+_LAN PCIE_TX5-_LAN PCIE_TX5+_LANC668 C6690.1u/16V_4 0.1u/16V_4PCIE_TX5PCIE_TX5+WIFIPCIE_RX6-_WLAN PCIE_RX6+_WLAN PCIE_TX6-_WLAN PCIE_TX6+_WLANC648 C649 (25) (25) (25) (25) (25) (25) (25) (25)0.1u/16V_4 0.1u/16V_4 SATA_RXN0 SATA_RXP0 SATA_TXN0 SATA_TXP0 SATA_RXN1 SATA_RXP1 SATA_TXN1 SATA_TXP1PCIE_TX6PCIE_TX6+USBP3USBP3+ USBP4USBP4+ USBP5USBP5+ USBP6USBP6+ USBP7USBP7+(28) (28) (26) (26) (21) (21) (21) (21) (28) (28)DB USB2.0 BT Touch Screen CCD Card readerAdd SSD ID 1/14 Hight is SSD , Low is ODD(25) SSD_ID R568 10K_4 SATAGP0 R570+3V_S5HDDUSB2100K_4ODDCCSkylake-U userd 24 MHz (50 Ohm ESR) XTALR178 R587 R778 113/F_4 1K_4 1K_4 USB_OC0# USB_OC1# USB_OC2# (28) (28) (28) DEVSLP0R562100/F_4 PCIE_RCOMPN PCIE_RCOMPP XDP_PRDY# XDP_PREQ# PIRQA#F5 E5 D56 D61 BB11 E28 E27 D24 C24 E30 F30 A25 B25USBCOMP Impedance = 50 ohm Trace length & 500 mils Trace spacing = 15 milsC665 3 410P/50V_424MHz: BGR536 1M_4 XTAL24_IN XTAL24_OUT 1 2 Y4 24MHz38.4MHz : ?TP91 TP92+3V_S5PCIE11_RXN/SATA1B_RXN PCIE11_RXP/SATA1B_RXP PCIE11_TXN/SATA1B_TXN PCIE11_TXP/SATA1B_TXP PCIE12_RXN/SATA2_RXN PCIE12_RXP/SATA2_RXP PCIE12_TXN/SATA2_TXN PCIE12_TXP/SATA2_TXP+3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5GPP_E9/USB2_OC0# GPP_E10/USB2_OC1# GPP_E11/USB2_OC2# GPP_E12/USB2_OC3# GPP_E4/DEVSLP0 GPP_E5/DEVSLP1 GPP_E6/DEVSLP2MB U3 MB U3 DB U2(25)C65810P/50V_4GPP_E0/SATAXPCIE0/SATAGP0 GPP_E1/SATAXPCIE1/SATAGP1 GPP_E2/SATAXPCIE2/SATAGP2Note: Change Y4 to 38.4 MHz(ESR 30 ohm) for Cannonlake UCH01006JB08 -& 10p CH01506JB06 -& 15p CH-6806TB01 -& 6.8p1 6.8p/50V_4 RTC_X1+3V_S58 OF 20 SKL_ULT/BGA REV = 1GPP_E8/SATALED#RTC Clock 32.768KHz (RTC)? C351Trace length & 1000 milsBU35JSKL_ULT? 2 C362 6.8p/50V_4Y2 32.768KHZR255 10M_4 RTC_X2BG -& SEG BG -& TXCBCLOCK SIGNALSN16S VGA(14) CLK_PCIE_VGA# (14) CLK_PCIE_VGA (14) CLK_PEGA_REQ#R235 *short_4CLK_PCIE_REQ0#D42 C42 AR10 B42 A42 AT7 D41 C41 AT8CLKOUT_PCIE_N0 CLKOUT_PCIE_P0 GPP_B5/SRCCLKREQ0# CLKOUT_PCIE_N1 CLKOUT_PCIE_P1 GPP_B6/SRCCLKREQ1# CLKOUT_PCIE_N2 CLKOUT_PCIE_P2 GPP_B7/SRCCLKREQ2# CLKOUT_PCIE_N3 CLKOUT_PCIE_P3 GPP_B8/SRCCLKREQ3# CLKOUT_PCIE_N4 CLKOUT_PCIE_P4 GPP_B9/SRCCLKREQ4# CLKOUT_PCIE_N5 CLKOUT_PCIE_P5 GPP_B10/SRCCLKREQ5#+3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S510 OF 20 CLKOUT_ITPXDP_N CLKOUT_ITPXDP_P F43 E43 BA17 CLK_PCIE_XDPN CLK_PCIE_XDPP SUSCLK TP93 TP94 SUSCLK (26)TP22CLK_PCIE_REQ1#RTC Circuitry (RTC)+3VPCU 1B-1+3V_S5GPD8/SUSCLK XTAL24_IN XTAL24_OUT XCLK_BIASREF RTCX1 RTCX2 SRTCRST# RTCRST#TP25CLK_PCIE_REQ2#E37 XTAL24_IN E35 XTAL24_OUT E42 XCLK_BIASREF AM18 RTC_X1 AM20 RTC_X2 AN18 SRTC_RST# AM16 RTC_RST# R512 R768 2.7K/F_4 *60.4/F_4 +1V_S5 R304 1.5K/F_4TP73D40 C40 CLK_PCIE_REQ3# AT10 B40 A40 AU8 E40 E38 AU7On SKL voltage at VCCRTC does not exceed 3.2V+3V_RTC Trace width = 30 milsR299 RTC_RST# VCCRTC_2 20K/F_4 BAT54C C380 1u/6.3V_4 R300 SRTC_RST# 20K/F_4 2 BAT_CONN C381 1u/6.3V_4 C382 1u/6.3V_4ALAN(23)(23) CLK_PCIE_LANN (23) CLK_PCIE_LANP CLK_PCIE_LAN_REQ# (26) CLK_PCIE_WLANN (26) CLK_PCIE_WLANP PCIE_CLKREQ_WLAN#+3V_RTC D7 +3V_RTC_2 R308 1K_4 +3V_RTC_1R229 *short_4 R224 *short_4CLK_PCIE_REQ4#Reserve PD 60 ohm in E42 ball for Cannonlake URTC_RST# (11) R301 45.3K/F_4WLAN(26)CLK_PCIE_REQ5#1Rev:D change to shortpadSKL_ULT/BGA REV = 11V power plane 0.71 checklist p14?1 2 J1 *JUMP+3V_RTC_[0:2] Trace width = 20 milsBT1+3VARev:D add for EC reset RTCSRTC_RST# RTC_RST# 1A-2
Chage +3V_RTC_0 to VCCTC_2. 3 3CLK_PCIE_REQ0# CLK_PCIE_REQ1# CLK_PCIE_REQ2# CLK_PCIE_REQ3# CLK_PCIE_REQ4# CLK_PCIE_REQ5#R234 R215 R227 R618 R228 R22310K_4 10K_4 10K_4 10K_4 10K_4 10K_41. AHL DBV CR2032(29) EC_RTCRST 2 PQ2K R786 100K_4 1 EC_RTCRST 2 PQ2K2. AHL VDE CR2032Rev:E Reserve onlyRev:E Reserve onlySize Date: Document NumberQuanta Computer Inc.PROJECT : ZRWSkylake 9/10 (PEG/USB/CLK)Monday, July 20, 201511Rev 3A 48Sheet6of543254Laptopblue3 SKL_ULT21?U35ESPI - FLASH07StrappingSMBALERT# (4) +3V SML0ALERT# (4) CLKRUN# IRQ_SERIRQ EC_RCIN# R630 R629 R639 8.2K/F_4 10K_4 10K_4DSMBUS, SMLINKDPCH_SPI_CLK PCH_SPI_SO PCH_SPI_SI PCH_SPI_IO2 PCH_SPI_IO3 PCH_SPI_CS0# PCH_SPI_CS1#AV2 AW3 AV3 AW2 AU4 AU3 AU2 AU1SPI0_CLK SPI0_MISO SPI0_MOSI SPI0_IO2 SPI0_IO3 SPI0_CS0# SPI0_CS1# SPI0_CS2#SPI - TOUCH+3V_S5+3V_S5 +3V_S5 +3V_S5GPP_C0/SMBCLK GPP_C1/SMBDATA GPP_C2/SMBALERT#R7 PCH_MBCLK0_R R8 PCH_MBDAT0_R R10 SMBALERT# R9 W2 W1VGA_MBCLK VGA_MBDATA SML0ALERT#M2 M3 J4 V1 V2 M1GPP_D1/SPI1_CLK GPP_D2/SPI1_MISO GPP_D3/SPI1_MOSI GPP_D21/SPI1_IO2 GPP_D22/SPI1_IO3 GPP_D0/SPI1_CS#C LINK+3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5+3V_S5 GPP_C3/SML0CLK GPP_C4/SML0DATA +3V_S5 GPP_C5/SML0ALERT# +3V_S5 +3V_S5 GPP_C6/SML1CLK +3V_S5 GPP_C7/SML1DATA +3V_S5 GPP_B23/SML1ALERT#/PCHHOT#W3 SMB_ME1_CLK V3 SMB_ME1_DAT AM7 SML1ALERT#SMB1ALERT#(27)Rev:D change to shortpadeSPI change to 15 ohm ckl v0.71 p.24LPCFor M.2 wifi module mustTP68 TP66 TP67CL_CLK CL_DAT CL_RST#G3 G2 G1 AW13 AY11Rev:D change to shortpad(29) (25,29) SIO_RCIN# IRQ_SERIRQ R652 *short_4 IRQ_SERIRQ EC_RCIN#CL_CLK CL_DATA CL_RST# GPP_A0/RCIN# GPP_A6/SERIRQSKL_ULT/BGA REV = 1+3V_S5 GPP_A1/LAD0/ESPI_IO0 GPP_A2/LAD1/ESPI_IO1 +3V_S5 GPP_A3/LAD2/ESPI_IO2 +3V_S5 GPP_A4/LAD3/ESPI_IO3 +3V_S5 GPP_A5/LFRAME#/ESPI_CS# +3V_S5 +3V_S5 GPP_A14/SUS_STAT#/ESPI_RESET# +3V_S5 GPP_A9/CLKOUT_LPC0/ESPI_CLK GPP_A10/CLKOUT_LPC1 +3V_S5 GPP_A8/CLKRUN# +3V_S5AY13 BA13 BB13 AY12 BA12 BA11 AW9 AY9 AW11R659 R640 R653 R668*short_4 *short_4 *short_4 *short_4R748 *0_4 C806 0.1u/16V_4 R623 R626 R627 CLKRUN# 22/J_4 22/J_4 22/J_4LPC_LAD0 (25,26,29) LPC_LAD1 (25,26,29) LPC_LAD2 (25,26,29) LPC_LAD3 (25,26,29) LPC_LFRAME# (25,26,29) ESPI_RST# (29)+3V_S5SMBusPCH_MBCLK0_R PCH_MBDAT0_R VGA_MBDATA VGA_MBCLK 2.2K_4 2.2K_4 2.2K_4 2.2K_4 R578 R580 R585 R582 +3V_S5eSPI change to 15 ohmCLK_PCI_EC (29) PCLK_TPM (25) CLK_PCI_LPC (26) CLKRUN# (25,29)+3V_S5 +3V_S55 OF 20 ?SML1ALERT#*150K_4R2052/10 add C806 for EMI request , R748 no stuiff from EC site move at CPU siteTermination Resistor Requirement for PCH PCHHOT# Pin Reserve PU 150K resisterCSPI ROM Skylake 3.3VVender WND GGDSizeQuanta P/N AKE3EFP0N07 AKE2EZN0Q00Vender P/N W25Q64FVSSIQ GD25B64CSIGRPCH SPI ROM(8M+4M) 15ohm CS0ohm CS03302JB29+3V_S5 U41Rev:D change to shortpadCR700*short_68M 8M+3V_PCH_ME C754+3V_PCH_ME 0.1u/16V_4+3VD2B change to 2.2k1A-13 PCH_SPI_CS0#PCH_SPI_SO PCH_SPI_SO_EC R650 R588 8M4M@15_4 8M@15_4 SPI_SO_8M1 2 3 4CS# IO1/DO IO2/WP# GNDVCC IO3/HOLD# CLK IO0/DI8 7 6 5SPI_HOLD_IO3_ME SPI_CLK_8M SPI_SI_8M R684 R691 R698 8M4M@15_4 8M4M@15_4 1K_4 PCH_SPI_CLK PCH_SPI_SISMBus(PCH)S5PCH_MBDAT0_RR576 2.2K_4 Q32R572 2.2K_45 3 2PCH_MBCLK0_RS04CLK_SDATA (12,13,27)W25Q64FV -- 8MB PCH_SPI_CLK_EC PCH_SPI_SI_EC +3V_PCH_ME R649 1K_4 SPI_WP_IO2_MEC747 *22p/50V_4 R687 R654 8M@15_4 8M@15_462N7002DW1CLK_SCLK(12,13,27)PCH_XDP_WLAN/S5R596 R589 R238 R239 U39 *4M@33_4 8M4M@15_4 *4M@33_4 8M4M@15_4 SPI_WP_IO2_EC SPI_WP_IO2_ME SPI_HOLD_IO3_EC SPI_HOLD_IO3_MEDDR_TP/S03.3K is original and for no support fast read functionR689 R641 R594 *4M@33_4 *4M@33_4 *4M@33_4 PCH_SPI_CLK_R PCH_SPI_SI_R PCH_SPI_SO_RPCH_SPI_IO2PCH_SPI_IO3 (29) PCH_SPI_CLK_EC (29) PCH_SPI_SI_EC (29) PCH_SPI_SO_ECreserve for SPI fast read+3V_PCH_MESMBus(EC)PCH_SPI_CS1# PCH_SPI_CLK PCH_SPI_SI PCH_SPI_SO C745 *22p/50V_4R669 R658 R604*4M@33_4 *4M@33_4 *4M@33_41 6 5 2 3CE# SCK SI SO WP#VDD HOLD# VSS8 7SPI_HOLD_IO3_EC R232 4C741 *4M@0.1u/16V_4 *1K_4 (17,29) (17,29) 2ND_MBCLK 2ND_MBDATA 2ND_MBCLK 2ND_MBDATA R171 R175 *short_4 *short_4 SMB_ME1_CLK SMB_ME1_DATBB(29)SPI_CS0#_UR_MER602 R6038M@0_4 PCH_SPI_CS0# *4M@0_4 PCH_SPI_CS1#only 0ohm option+3V_PCH_ME R591 10K_4 SPI_CS0#_UR_MEPCH_SPI_CLK_R PCH_SPI_SI_R PCH_SPI_SO_R*4M@ROM-4M_ECEC/S5+3V_PCH_ME R597 *1K_4 SPI_WP_IO2_ECRev:D change to shortpad1A-3
Add U34 flash 4M ROM reserve for ZQ0D.AAQuanta Computer Inc.PROJECT : ZRWSize Document NumberSkylake 5 (SATA/HDA/SPI)Date:5 4 3 2Rev 3A of 48Monday, July 20, 20151Sheet754PCI_PLTRST# (11) (29) +VCCIO SYS_RESET# RSMRST# R655 SYS_RESET# *short_4 R554 PCH_RSMRST# AN10 B5 AY17 PROC_PWRGD SYS_PWROKDLaptopblue321U35KSKL_ULT? SUS0# (29) +3VSYSTEM POWER MANAGEMENT08(29) PCH_VRALERT# SYS_RESET# R211 R561 10K_4 10K_4 PCH_SLP_A# DNBSWON# ACPRESENT (11) (29) (29) PCH_ACPRESENT PCH_BATLOW# PCIE_LAN_WAKE# MPHY_EXT_PWR R651 R628 R250 R195 R642 R648 R555 R675 8.2K/F_4 8.2K/F_4 10K_4 *1K_4 10K_4 10K_4 10K_4 100K_4DRev:D change to shortpad11/12 Reserve PU 10K*10K_4 PROC_PWRGD R556 R643 *short_4 *0_410K_4 GPP_B13/PLTRST# SYS_RESET# RSMRST#+3V_S5VCCST_PWRGD R544+3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5GPP_B12/SLP_S0# GPD4/SLP_S3# GPD5/SLP_S4# GPD10/SLP_S5# SLP_SUS# SLP_LAN# GPD9/SLP_WLAN# GPD6/SLP_A# GPD3/PWRBTN# GPD1/ACPRESENT GPD0/BATLOW# GPP_A11/PME# INTRUDER#AT11 AP15 BA16 AY16 AN15 AW15 BB17 AN16 BA15 AY15 AU13SUSB# SUSC# PCH_SLP_S5# PCH_SLP_SUS# PCH_SLP_LAN# PCH_SLP_WLAN# PCH_SLP_A# *short_4 PCH_PWRBTN# PCH_ACPRESENT PCH_BATLOW# R249 *short_4 TP29SUSB# (11,29,31) SUSC# (11,29) PCH_SLP_S5# (11) PCH_SLP_SUS# TP30 TP23 R677 R676 TP74 1M_4 +3V_RTCA68 B65 B6 BA20 BB20IPROCPWRGD I VCCST_PWRGD SYS_PWROK PCH_PWROK DSW_PWROKRev:D change to shortpad+3V_S5Rev:D change to shortpad(29) PCH_SUSPWRACK_R (29) (23,26) PCH_SUSACK# PCIE_LAN_WAKE# R622 R617SYS_PWROK_R EC_PWROK_R DPWROK_R*0_4 PCH_SUSPWRACK AR13 SUSACK#_R AP11 *0_4 PCIE_LAN_WAKE# TP84 BB15 AM15 AW17 AT15GPP_A13/SUSWARN#/SUSPWRDNACK +3V_S5 GPP_A15/SUSACK# +3V_S5 WAKE# GPD2/LAN_WAKE# GPD11/LANPHYPC GPD7/RSVD SKL_ULT/BGA REV = 1+3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S511 OF 20AU11 AP16 INTRUDER#GPP_B11/EXT_PWR_GATE# GPP_B2/VRALERT#AM10 MPHY_EXT_PWR AM11 PCH_VRALERT#Rev:F addTP19?PCH_RSMRST# PCH_PWROK SYS_PWROK_R DPWROK_CU35ICSI-2SKL_ULT?A36 B36 C38 D38 C36 D36 A38 B38 C31 D31 C33 D33 A31 B31 A33 B33 A29 B29 C28 D28 A27 B27 C27 D27CSI2_DN0 CSI2_DP0 CSI2_DN1 CSI2_DP1 CSI2_DN2 CSI2_DP2 CSI2_DN3 CSI2_DP3 CSI2_DN4 CSI2_DP4 CSI2_DN5 CSI2_DP5 CSI2_DN6 CSI2_DP6 CSI2_DN7 CSI2_DP7 CSI2_DN8 CSI2_DP8 CSI2_DN9 CSI2_DP9 CSI2_DN10 CSI2_DP10 CSI2_DN11 CSI2_DP11CSI2_CLKN0 CSI2_CLKP0 CSI2_CLKN1 CSI2_CLKP1 CSI2_CLKN2 CSI2_CLKP2 CSI2_CLKN3 CSI2_CLKP3C37 D37 C32 D32 C29 D29 B26 A26 E13 B7 R145 100/F_4 TP63+3V_S5REV:E tPLT15(max 200us) -&SLP_S4# assertion to VDDQ(+1.35VSUS) ramp down start(SUSON)5C811*0.1u/16V_42 SUSON (32,35) SUSON U48 *TC7SH08FU AP2 AP1 AP3 AN3 AN1 AN2 AM4 AM1 AM2 AM3 AP4 AT1 RAM_ID1 RAM_ID2 RAM_ID3 Board_ID0 Board_ID1 Board_ID2 Board_ID3 Board_ID4 Board_ID5 Board_ID6 Board_ID7 200/F_4 R616 3 4 1SUSC# SUSON_EC SUSON_EC (29)Board IDC+3V_S5CSI2_COMP GPP_D4/FLASHTRIG+1.8V_S5EMMCR610 R612 R614 R595 R598 R605 R592 R606 R764 R76610K_4 10K_4 10K_4 10K_4 10K_4 10K_4 10K_4 10K_4 10K_4 10K_4RAM_ID1 RAM_ID2 RAM_ID3 Board_ID0 Board_ID1 Board_ID2 Board_ID3 Board_ID4 Board_ID5 Board_ID6 Board_ID7R611 R613 R615 R600 R599 R608 R590 R593 R607 R765 R767*10K_4 *10K_4 *10K_4 *10K_4 *10K_4 *10K_4 *10K_4 10K_4 *10K_4 *10K_4 *10K_4+1.8V_S5 +1.8V_S5 +1.8V_S5 +1.8V_S5 +1.8V_S5 +1.8V_S5 +1.8V_S5 +1.8V_S5 +1.8V_S5 +1.8V_S5 +1.8V_S59 OF 20GPP_F13/EMMC_DATA0 GPP_F14/EMMC_DATA1 GPP_F15/EMMC_DATA2 GPP_F16/EMMC_DATA3 GPP_F17/EMMC_DATA4 GPP_F18/EMMC_DATA5 GPP_F19/EMMC_DATA6 GPP_F20/EMMC_DATA7 GPP_F21/EMMC_RCLK GPP_F22/EMMC_CLK GPP_F12/EMMC_CMD EMMC_RCOMPCREV:F Stuff R790Board_ID4 (21)R7900_4SKL_ULT/BGA REV = 1+3V_S5 ? +3V_S5Low BOARD_ID0 BOARD_ID1 BOARD_ID2 BOARD_ID3 BOARD_ID4BHigh VRAM 4GB IOAC G-sensor TPM touch panel BOARD_ID5 BOARD_ID6 BOARD_ID7Low Realtek Audio codec Reserved (Default) Reserved (Default)High CPU DSP5REV:E ?tPLT17(max 200us) -&SLP_S3# assertion to IMVP VR_ON(VRON) deassertion4 (33,36) VRONC813*0.1u/16V_4REV:E tPLT18(max 200 us) -&SLP_S3# assertion to VCCIO VR(MAIND for +1V_S5 to +VCCIO) disabled4 (35,40) VRON_EC (29) MAINONC812 5*0.1u/16V_4VRAM 2GB Non IOAC No G-sensor No TPM No touch panel2 2 1 SUSB# VRON_EC 1 U49 *TC7SH08FU 3SUSB# MAINON_EC MAINON_EC (29)Reserve ReserveREV:F Stuff R792U50 *TC7SH08FU3R7920_4REV:F Stuff R791R7910_4Power Sequence(29) PCH_PWROK EC_PWROKNon Deep SxBRev:D change to shortpadR647 R131 *short_4 *0_4 EC_PWROK_R SYS_PWROK_RFor platforms not supporting Deep Sx, connect directly to RSMRST#DPWROK_R DPWROK_RNo Deep Sx Rev:D change to shortpadR661 R674 *short_4 *0_4 PCH_RSMRST#VCCST PWRGD(29) +1V_VCCSTCRB is via +1.05V PG+3V_S5 5 U6 VCC NC A Y GNDB2A S0-&S5 & S0-&S3 Power of sequence 1us SUSB# -& VCCST_PWRGD+3V_S5DPWROK_CC808 5 1 2 3 VCCST_PWRGD_EN_L 40.1u/16V_4R85 1K_4 VCCST_PWRGD R89 C136 *0.1u/16V_4 *0.1u/16V_4 60.4/F_4C164 0.1u/16V_4 42SUSB#1VCCST_PWRGD_EN U47 TC7SH08FU 3 *0_4VCCST_PWRGD_R+3V_S5 +3V74AUP1G07GWPLTRST# BufferC332 5 2 4ASYSPWOKC168 0.1u/16V_4 5Shortpad change to 60.4 ohm. 11/6VCCST_PWRGD_EN R103 R102 *0_4 0_4 PCH_PWROK HWPGR7772 PLTRST# (14,23,25,26,29) SYS_PWROK 4 1 U8 *TC7SH08FU R113 R560 3EC_PWROKHWPG(29)AEC_PWROK(29) (2)1A-6
Del APWORK.Rev:D change netmane for HWPGPCI_PLTRST#1 U14 TC7SH08FU 3 R214 100K_4IMVP_PWRGD_3V R130 *10K_4*0_4 *short_4Rev:D change to shortpadSize Date:5 4 3 2Quanta Computer Inc.PROJECT : ZRWDocument NumberSkylake 9/11 (PWROK/Board_ID)Monday, July 20, 20151Rev 3A 48Sheet8of54Laptopblue321VCCPRIM_1P0 & VCCPRIM_CORE ShortU35S ?SKL_ULTGPIO Group Power Plane? C292 C268 C230 C265 *short_6 *short_6 *short_6 *short_6 *short_6 *short_6 *short_6 C256 C270 *1U/6.3V_4 1U/6.3V_4 1U/6.3V_4 *1U/6.3V_4 R198 R185 R182 R187 R179 R192 R188 1U/6.3V_4 *1U/6.3V_409Rev:D change to shortpad+3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +1.8V_S5 +3V_S5DRev:D change to shortpadRESERVED SIGNALS-1U35OSKL_ULT CPU POWER 4 OF 4Rev:F Remove Short Jumper for all +1V_S5RSVD_TP_BB68 RSVD_TP_BB69 RSVD_TP_AK13 RSVD_TP_AK12 RSVD_BB2 RSVD_BA3 TP5 TP6 RSVD_D5 RSVD_D4 RSVD_B2 RSVD_C2 RSVD_B3 RSVD_A3 RSVD_AW 1 BB68 BB69 AK13 AK12 BB2 BA3 AU5 AT5 D5 D4 B2 C2 B3 A3C179 1U/6.3V_4 TP95 +1V_S5 C217 +1V_S5 C698 C699 1U/6.3V_4 +1V_S5 +1V_S5 C695 1U/6.3V_4 C191 C182 1U/6.3V_4 1U/6.3V_4 47u/6.3V_8 C712DCFG4E68 B67 D65 D67 E70 C68 D68 C67 F71 G69 F70 G68 H70 G71 H69 G70 E63 F63 E66 F66CFG[0] CFG[1] CFG[2] CFG[3] CFG[4] CFG[5] CFG[6] CFG[7] CFG[8] CFG[9] CFG[10] CFG[11] CFG[12] CFG[13] CFG[14] CFG[15] CFG[16] CFG[17] CFG[18] CFG[19] CFG_RCOMP ITP_PMODE RSVD_AY2 RSVD_AY1 RSVD_D1 RSVD_D3 RSVD_K46 RSVD_K45 RSVD_AL25 RSVD_AL27 RSVD_C71 RSVD_B70 RSVD_F60 RSVD_A52 RSVD_TP_BA70 RSVD_TP_BA68 RSVD_J71 RSVD_J68 VSS_F65 VSS_G65 RSVD_F61 RSVD_E6119 OF 20AB19 AB20 P18 AF18 AF19 V20 V21VCCPRIM_1P0 VCCPRIM_1P0 VCCPRIM_1P0 VCCPRIM_CORE VCCPRIM_CORE VCCPRIM_CORE VCCPRIM_CORE DCPDSW _1P01.0V 696mA S5 1.0V 2.574A S5 1.0V22mA44mARev:F reserve TPS5Rev:F Stuff C69933mA 41mAVCCPGPPA VCCPGPPB VCCPGPPC VCCPGPPD VCCPGPPE VCCPGPPF VCCPGPPGAK15 AG15 Y16 Y15 T16 AF16 AD15 V19 T1 AA1+VCCPGPPA +VCCPGPPB +VCCPGPPC +VCCPGPPD +VCCPGPPE +VCCPGPPF +VCCPGPPG +VCCPRIM_3P3 +VCCPRIM_1P0 C250 +VCCATS_1P8+VCCDSW_1P0 AL175mA with AJ21 pinVCCPRIM_3P3_V19 VCCPRIM_1P0_T1 VCCATS_1P8C793 1U/6.3V_4 1U/6.3V_4 47u/6.3V_8K17 L1 N15 N16 N17 P15 P16 K15 L15 V15VCCMPHYAON_1P0 VCCMPHYAON_1P01.0V S51.0V&1mA6mA 1.8VVCCMPHYGT_1P0_N15 VCCMPHYGT_1P0_N16 VCCMPHYGT_1P0_N17 VCCMPHYGT_1P0_P15 VCCMPHYGT_1P0_P16 VCCAMPHYPLL_1P0 VCCAMPHYPLL_1P0 VCCAPLL_1P01.0V1.258AVCCRTCPRIM_3P3 VCCRTC_AK19 VCCRTC_BB14 DCPRTC3.0V+ RTCAK17 +VCCPRTCPRIM_3P3 C349 AK19 +VCCPRTC BB14 C322 BB10 A14 K19C680 DCPRTC1U/6.3V_4 *short_6 R180 *short_6 R240 C348 0.1U/16V_4 1U/6.3V_4 *short_6 R252 1U/6.3V_4 C352 0.1U/16V_4 C732 0.1U/16V_4+1V_S5 +1.8V_S5 +3V_S5 +3V_RTCAW 1 E1 E2 BA4 BB4 A4 C4 BB5 A69 B69 AY3 D71 C70 C54 D54 AY4 BB3 AY71 AR56 AW 71 AW 70 AP56 C64R761 100K_4 R760 *short_4 R762 *GT3@0_4 R759 *short_4 +1V_S5 +1V_S5 +3VPCU +3V_S5 +3V +1.5V +3V_S5 +1V_S5 C192 1U/6.3V_4 +VCCPRIM_3P3 1U/6.3V_4 C225 *1U/6.3V_41.0V 1.0V135mAR156 +1V_S549.9/F_4 CFG_RCOMP R153 1.5K/F_4E60 E8 AY2 AY1RSVD_E1 RSVD_E2 RSVD_BA4 RSVD_BB4 RSVD_A4 RSVD_C4 TP4 RSVD_A69 RSVD_B69 RSVD_AY3 RSVD_D71 RSVD_C70 RSVD_C54 RSVD_D54 TP1 TP2 VSS_AY71 ZVM# RSVD_TP_AW 71 RSVD_TP_AW 70 MSM# PROC_SELECT#AB17 Y18 AD17 AD18 AJ17 AJ19 AJ16 AF20 AF21 T19 T20 AJ21 AK20 N181.0V 26mA S5 1.0V 696mA S5118mAVCCCLK1 VCCCLK2 VCCCLK3 VCCCLK4 VCCCLK5 VCCCLK6+1V_S5 *1U/6.3V_4VCCPRIM_1P0_AB17 VCCPRIM_1P0_Y18 VCCDSW _3P3_AD17 VCCDSW _3P3_AD18 VCCDSW _3P3_AJ17 VCCHDA VCCSPIL21 N20 L19CCD1 D3 K46 K45 AL25 AL27 C71 B70 F60 A52 BA70 BA68 J71 J68 F65 G65 F61 E61+VCCPDSW_3P3 R210 *0_6 R212 *short_6 *0.1U/16V_4 C314 R789 0_6 +VCCHDA R683 *0_6 C748 1U/6.3V_4 +VCCPSPI R193 *short_6S53.3V S51.5V 30mA 3.3V 11mA S5642mAA10C672 1U/6.3V_4 TP31 TP16+3VGPP_B0/CORE_VID0 GPP_B1/CORE_VID1AN11 AN13V0P85A_VID0 V0P85A_VID1VCCSRAM_1P0 VCCSRAM_1P0 VCCSRAM_1P0 VCCSRAM_1P01.0VRev:D change to shortpad+3V_S5 +1V_S5 +1V_S5R186*short_6 C261VCCPRIM_3P3_AJ21 VCCPRIM_1P0_AK20 VCCAPLLEBBSKL_ULT/BGA REV = 13.3V 75mA S5 1.0V 696mA S5C1731U/6.3V_41.0V 33mA15 OF 20 ?LPM_ZVM_N(33)For 2+3e CPU No StuffTP88BSKL_ULT/BGA REV = 1+1V_VCCST ?BPin NameCFG[0] CFG[1] CFG[2] CFG[3] CFG[4]Strap descriptionStall reset sequence after PCU PLL lock until de-asserted Reserved Configuration lane PCI Express* Static x16 Lane Numbering Reversal Reserved Configuration lane eDP enableConfiguration1 = *Normal O No stall (iPU 3K) 0 = StallNote1 = *Normal Operation(iPU 3K) 0 = Lan number reversedH & S processor used only1 = Disabled (iPU 3K) 0 = *Enabled 00 = 1x8, 2x4 PCI Express* 01 = reserved 10 = 2x8 PCI Express* 11 = 1x16 PCI Express* 1 = *PEG Train immediatedly follow RESET# de-assertion (iPU 3K) 0 = PEG wait for BIOS for trainingCFG4R5481K_4ACFG[6:5]PCI Express* BifunctionH & S processor used onlyACFG[7]PEG TrainingH & S processor used onlyQuanta Computer Inc.PROJECT : ZRWSize Date: Document NumberCFG[19:8]Reserved Configuration laneSkylake PCH-LP 15/19 (POWER)Monday, July 20, 20151Rev 3A 48Sheet9of543254Laptopblue3 SKL_ULT21Skylake ULT (GND)SKL_ULT D GND 1 OF 310SKL_ULT?U35P?U35Q?U35RU35TSKL_ULT?DGND 2 OF 3GND 3 OF 3SPARECBAA5 A67 A70 AA2 AA4 AA65 AA68 AB15 AB16 AB18 AB21 AB8 AD13 AD16 AD19 AD20 AD21 AD62 AD8 AE64 AE65 AE66 AE67 AE68 AE69 AF1 AF10 AF15 AF17 AF2 AF4 AF63 AG16 AG17 AG18 AG19 AG20 AG21 AG71 AH13 AH6 AH63 AH64 AH67 AJ15 AJ18 AJ20 AJ4 AK11 AK16 AK18 AK21 AK22 AK27 AK63 AK68 AK69 AK8 AL2 AL28 AL32 AL35 AL38 AL4 AL45 AL48 AL52 AL55 AL58 AL64VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS 16 OF 20 SKL_ULT/BGA REV = 1VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSSAL65 AL66 AM13 AM21 AM25 AM27 AM43 AM45 AM46 AM55 AM60 AM61 AM68 AM71 AM8 AN20 AN23 AN28 AN30 AN32 AN33 AN35 AN37 AN38 AN40 AN42 AN58 AN63 AP10 AP18 AP20 AP23 AP28 AP32 AP35 AP38 AP42 AP58 AP63 AP68 AP70 AR11 AR15 AR16 AR20 AR23 AR28 AR35 AR42 AR43 AR45 AR46 AR48 AR5 AR50 AR52 AR53 AR55 AR58 AR63 AR8 AT2 AT20 AT23 AT28 AT35 AT4 AT42 AT56 AT58AT63 AT68 AT71 AU10 AU15 AU20 AU32 AU38 AV1 AV68 AV69 AV70 AV71 AW10 AW12 AW14 AW16 AW18 AW21 AW23 AW26 AW28 AW30 AW32 AW34 AW36 AW38 AW41 AW43 AW45 AW47 AW49 AW51 AW53 AW55 AW57 AW6 AW60 AW62 AW64 AW66 AW8 AY66 B10 B14 B18 B22 B30 B34 B39 B44 B48 B53 B58 B62 B66 B71 BA1 BA10 BA14 BA18 BA2 BA23 BA28 BA32 BA36 F68 BA45VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSSVSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS 17 OF 20BA49 BA53 BA57 BA6 BA62 BA66 BA71 BB18 BB26 BB30 BB34 BB38 BB43 BB55 BB6 BB60 BB64 BB67 BB70 C1 C25 C5 D10 D11 D14 D18 D22 D25 D26 D30 D34 D39 D44 D45 D47 D48 D53 D58 D6 D62 D66 D69 E11 E15 E18 E21 E46 E50 E53 E56 E6 E65 E71 F1 F13 F2 F22 F23 F27 F28 F32 F33 F35 F37 F38 F4 F40 F42 BA41F8 G10 G22 G43 G45 G48 G5 G52 G55 G58 G6 G60 G63 G66 H15 H18 H71 J11 J13 J25 J28 J32 J35 J38 J42 J8 K16 K18 K22 K61 K63 K64 K65 K66 K67 K68 K70 K71 L11 L16 L17VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS 18 OF 20 SKL_ULT/BGA REV = 1VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSSL18 L2 L20 L4 L8 N10 N13 N19 N21 N6 N65 N68 P17 P19 P20 P21 R13 R6 T15 T17 T18 T2 T21 T4 U10 U63 U64 U66 U67 U69 U70 V16 V17 V18 W13 W6 W9 Y17 Y19 Y20 Y21+1.8V_S5R775*0_4AW69 AW68 AU56 AW48 C7 U12 U11 H11RSVD_AW69 RSVD_AW68 RSVD_AU56 RSVD_AW48 RSVD_C7 RSVD_U12 RSVD_U11 RSVD_H11 20 OF 20 SKL_ULT/BGA REV = 1RSVD_F6 RSVD_E3 RSVD_C11 RSVD_B11 RSVD_A11 RSVD_D12 RSVD_C12 RSVD_F52F6 E3 C11 B11 A11 D12 C12 F52C794 *1U/6.3V_4 ?Reserve 1uF no stuff in CPU U11,U12 ball support Cannonlake-U PCHCB?AQuanta Computer Inc.? Size Date: Document Number?SKL_ULT/BGA REV = 1PROJECT : ZRWSkylake 10/17/18 (GND)Monday, July 20, 2015 Sheet1Rev 3A 10 of 48543254Laptopblue32111DDCCBBAPS1R289*0_6APS3R272*0_6APS7Intel APS Fixture use+3V_S5 CN2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 APS1 APS3 R291 R282 R278 R279 R274 R273 R271 R268 R265 R267 *0_6 *0_4 *0_6 *0_4 *0_4 *0_4 *0_6 *0_4 *0_4 *0_4 SYS_RESET# SUSB# (8,29,31)+3VPCUAPS7PCH_SLP_S5# (8) SUSC# (8,29) PCH_SLP_A# (8) RTC_RST# NBSWON# SYS_RESET# (6) (27,29) (8)+3VPCUAAQuanta Computer Inc.PROJECT :ZRWSize Date:5 4 3 2*ACES_N Document NumberCPU/PCH XDPMonday, July 20, 2015 Sheet1Rev 3A 11 of 4854(3)M_A_A[15:0] M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15 (3) (3) (3) (3) (3) (3) (3) (3) (3) (3) (3) (3) (3) (3) M_A_BS#0 M_A_BS#1 M_A_BS#2 M_A_CS#0 M_A_CS#1 M_A_CLK0 M_A_CLK0# M_A_CLK1 M_A_CLK1# M_A_CKE0 M_A_CKE1 M_A_CAS# M_A_RAS# M_A_WE# 98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78 109 108 79 114 121 101 103 102 104 73 74 115 110 113 197 201 202 200 116 120 11 28 46 63 136 153 170 187 M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7 12 29 47 64 137 154 171 188 10 27 45 62 135 152 169 186JDIM2A A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15 BA0 BA1 BA2 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# WE# SA0 SA1 SCL SDA ODT0 ODT1 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194DR332 R33510K_4 10K_4 (7,13,27) (7,13,27) (3) (3)DIMM0_SA0 DIMM0_SA1CLK_SCLK CLK_SDATA M_A_ODT0_DIMM M_A_ODT1_DIMMC1A-8 Change DIMM1_SA0/SA1 to DIMM0_SA0/SA1.(3)M_A_DQS[7:0](3) 1A-2BM_A_DQS#[7:0]M_A_DQ0 (3) M_A_DQ4 (3) M_A_DQ6 (3) M_A_DQ7 (3) M_A_DQ1 (3) M_A_DQ5 (3) M_A_DQ3 (3) M_A_DQ2 (3) M_A_DQ12 (3) M_A_DQ8 (3) M_A_DQ10 (3) M_A_DQ14 (3) M_A_DQ9 (3) M_A_DQ13 (3) M_A_DQ15 (3) M_A_DQ11 (3) M_A_DQ17 (3) M_A_DQ21 (3) M_A_DQ22 (3) M_A_DQ18 (3) M_A_DQ20 (3) M_A_DQ16 (3) M_A_DQ23 (3) M_A_DQ19 (3) M_A_DQ28 (3) M_A_DQ24 (3) M_A_DQ30 (3) M_A_DQ31 (3) M_A_DQ25 (3) M_A_DQ29 (3) M_A_DQ27 (3) M_A_DQ26 (3) M_A_DQ36 (3) M_A_DQ33 (3) M_A_DQ38 (3) M_A_DQ39 (3) M_A_DQ32 (3) M_A_DQ37 (3) M_A_DQ34 (3) M_A_DQ35 (3) M_A_DQ44 (3) M_A_DQ45 (3) M_A_DQ46 (3) M_A_DQ47 (3) M_A_DQ40 (3) M_A_DQ41 (3) M_A_DQ42 (3) M_A_DQ43 (3) M_A_DQ48 (3) M_A_DQ52 (3) M_A_DQ55 (3) M_A_DQ54 (3) M_A_DQ53 (3) M_A_DQ49 (3) M_A_DQ51 (3) M_A_DQ50 (3) M_A_DQ59 (3) M_A_DQ58 (3) M_A_DQ56 (3) M_A_DQ57 (3) M_A_DQ62 (3) M_A_DQ63 (3) M_A_DQ60 (3) M_A_DQ61 (3)Laptopblue321+1.35VSUS 75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124 +3V 199 77 122 125 PM_EXTTS#0 198 30 1 126 2 3 8 9 13 14 19 20 25 26 31 32 37 38 43JDIM2B VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18 VDDSPD NC1 NC2 NCTEST EVENT# RESET# VREF_DQ VREF_CA VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 19612D2.48APC2100 DDR3 SDRAM SO-DIMM (204P)+3V (3,13)R347*10K_4DDR3_DRAMRST# +SMDDR_VREF_DQ0 +SMDDR_VREF_DIMMC465 *0.1u/16V_4 +SMDDR_VREF_DQ0PC2100 DDR3 SDRAM SO-DIMM (204P)CVTT1 VTT2 GND GND203 204 205 206+VDDQ_VTTDDR3-DIMM1_H=4.0_STDM1 solution+1.35VSUSR358 1.8K/F_4 R362 *Short_6 2 R363 C478 0.022u/16V_4 R357 24.9/F_4 2/F_6 R346 1.8K/F_4Vref_CA+SMDDR_VREF_DIMM Chage net name M_B_DQS#[7:0] to M_A_DQS#[7:0].DDR3-DIMM1_H=4.0_STD+VREF_CA_CPUM3 solution+1.35VSUSPlace these Caps near SO-DIMM+SMDDR_VREF_DIMM C471 10u/6.3V_6 C432 10u/6.3V_6 C445 10u/6.3V_6 C446 0.1u/16V_4 C447 0.1u/16V_4 + C486 C480 330u/2V_u/16V_4 C472 10u/6.3V_6 C430 10u/6.3V_6 C444 0.1u/16V_4 C466 0.1u/16V_4 C464 0.1u/16V_4 C473 C441 C443 +SMDDR_VREF_DQ0C470 10u/6.3V_60.1u/16V_4 2.2u/6.3V_6 2.2u/6.3V_61C479 470p/50V_4BM1 solution+1.35VSUS+3V+VDDQ_VTT R330 1.8K/F_4 C439 2.2u/6.3V_6 C448 0.1u/16V_4 C468 1u/6.3V_4 C434 1u/6.3V_4 C467 1u/6.3V_4 C442 1u/6.3V_4 C449 C463 C455 2 4.7U/10V_6 +VREFDQ_SA_M3 R327 *Short_6 R328 C427 0.022u/16V_4 R325 24.9/F_4 2/F_6 R331 1.8K/F_4Vref_DQ+SMDDR_VREF_DQ04.7U/10V_6 4.7U/10V_6M3 solutionA1C440 470p/50V_4ACHA CHB5 4SA1 0 13SA0 0 02Quanta Computer Inc.PROJECT : ZRWSize Date: Document NumberDDR3 MEMORY SO-DIMM AMonday, July 20, 2015 Sheet1Rev 3A of 481254(3)M_B_A[15:0] M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15 (3) (3) (3) (3) (3) (3) (3) (3) (3) (3) (3) (3) (3) (3) M_B_BS#0 M_B_BS#1 M_B_BS#2 M_B_CS#0 M_B_CS#1 M_B_CLK0 M_B_CLK0# M_B_CLK1 M_B_CLK1# M_B_CKE0 M_B_CKE1 M_B_CAS# M_B_RAS# M_B_WE#JDIM1ALaptopblue321+1.35VSUSJDIM1BD+3VCR323 R30510K_4 10K_4 (7,12,27) (7,12,27) (3) (3)DIMM1_SA0 DIMM1_SA1CLK_SCLK CLK_SDATA M_B_ODT0_DIMM M_B_ODT1_DIMM109 108 79 114 121 101 103 102 104 73 74 115 110 113 197 201 202 200 116 120 11 28 46 63 136 153 170 187BA0 BA1 BA2 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# WE# SA0 SA1 SCL SDA ODT0 ODT1 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7PC2100 DDR3 SDRAM SO-DIMM (204P)+3V199 77 122 125VDDSPD NC1 NC2 NCTEST EVENT# RESET# VREF_DQ VREF_CA VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15+3V (3,12)R324*10K_4 PM_EXTTS#1DDR3_DRAMRST# +SMDDR_VREF_DQ1 +SMDDR_VREF_DIMM198 30 1 126 2 3 8 9 13 14 19 20 25 26 31 32 37 38 43C415 *0.1u/16V_4 +SMDDR_VREF_DQ1PC2100 DDR3 SDRAM SO-DIMM (204P)98 97 96 95 92 91 90 86 89 85 107 84 83 119 80 78A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15(3)M_B_DQS[7:0]B(3)M_B_DQS#[7:0]M_B_DQS1 M_B_DQS0 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 M_B_DQS#1 M_B_DQS#0 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#712 29 47 64 137 154 171 188 10 27 45 62 135 152 169 186DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ635 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194M_B_DQ12 (3) M_B_DQ8 (3) M_B_DQ11 (3) M_B_DQ10 (3) M_B_DQ9 (3) M_B_DQ13 (3) M_B_DQ15 (3) M_B_DQ14 (3) M_B_DQ4 (3) M_B_DQ0 (3) M_B_DQ3 (3) M_B_DQ6 (3) M_B_DQ5 (3) M_B_DQ1 (3) M_B_DQ2 (3) M_B_DQ7 (3) M_B_DQ17 (3) M_B_DQ16 (3) M_B_DQ18 (3) M_B_DQ19 (3) M_B_DQ21 (3) M_B_DQ20 (3) M_B_DQ22 (3) M_B_DQ23 (3) M_B_DQ24 (3) M_B_DQ25 (3) M_B_DQ30 (3) M_B_DQ31 (3) M_B_DQ28 (3) M_B_DQ29 (3) M_B_DQ26 (3) M_B_DQ27 (3) M_B_DQ36 (3) M_B_DQ37 (3) M_B_DQ39 (3) M_B_DQ35 (3) M_B_DQ32 (3) M_B_DQ33 (3) M_B_DQ34 (3) M_B_DQ38 (3) M_B_DQ44 (3) M_B_DQ45 (3) M_B_DQ42 (3) M_B_DQ43 (3) M_B_DQ41 (3) M_B_DQ40 (3) M_B_DQ46 (3) M_B_DQ47 (3) M_B_DQ48 (3) M_B_DQ52 (3) M_B_DQ55 (3) M_B_DQ54 (3) M_B_DQ49 (3) M_B_DQ53 (3) M_B_DQ50 (3) M_B_DQ51 (3) M_B_DQ57 (3) M_B_DQ56 (3) M_B_DQ58 (3) M_B_DQ62 (3) M_B_DQ61 (3) M_B_DQ60 (3) M_B_DQ63 (3) M_B_DQ59 (3)2.48A75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS5244 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 19613DCVTT1 VTT2 GND GND203 204 205 206+VDDQ_VTTDDR3-DIMM1_H=4.0_RVSM1 solution+1.35VSUSR309 1.8K/F_4 R302 *Short_6 R307 2/F_6 R310 1.8K/F_4Vref_DQ+SMDDR_VREF_DQ1B+VREFDQ_SB_M31A- Swap M_B_DQS2/M_B_DQS3 and swap M_B_DQS#2/M_B_DQS#3.DDR3-DIMM1_H=4.0_RVSM3 solution2C397 0.022u/16V_4 R313 24.9/F_4+1.35VSUSPlace these Caps near SO-DIMM+SMDDR_VREF_DIMM C418 10u/6.3V_6 C401 10u/6.3V_6 C402 10u/6.3V_6 C400 0.1u/16V_4 C416 0.1u/16V_4 + C433 C422 330u/2V_u/16V_4 C420 10u/6.3V_6 C404 10u/6.3V_6 C421 0.1u/16V_4 C403 0.1u/16V_4 C399 0.1u/16V_4 C423 C393 C392 +SMDDR_VREF_DQ1C419 10u/6.3V_60.1u/16V_4 2.2u/6.3V_6 2.2u/6.3V_61C391 470p/50V_4CHA CHBSA1 0 1SA0 0 0+3V+VDDQ_VTTAC388 2.2u/6.3V_6C390 0.1u/16V_4C429 1u/6.3V_4C396 1u/6.3V_4C426 1u/6.3V_4C395 1u/6.3V_4C394C417C414 4.7U/10V_6A4.7U/10V_6 4.7U/10V_6Quanta Computer Inc.PROJECT : ZRWSize Date:5 4 3 2Document NumberDDRIII Memory SO-DIMM BMonday, July 20, 2015 Sheet1Rev 3A 13 of 481234+1.05V_GFX C605 C72 C78 C111 C63 C97 C91LaptopbluePEGX_RST# +3V_GFX CLK_PCIE_VGA CLK_PCIE_VGA# (6) (6) (17)5678U34ANear GPUAEV@22U/6.3VS_6 EV@22U/6.3VS_6 EV@4.7U/10V_6 EV@4.7U/10V_6 EV@4.7U/10V_6 AA22 AB23 AC24 AD25 EV@1U/6.3V_4 AE26 EV@1U/6.3V_4 AE271/14 PCI_EXPRESS PEX_WAKE PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDDAB6 AC7 VGA_RST# AC6 PEX_CLKREQ# AE8 AD8C134 R86 R91*0.1U/16V_4 EV@0_4 EV@10K/F_4NVDD = 32.22 ~ 26.66 A Under GPU+VGPU_COREU34E11/14 NVVDD14U34C14/14 XVDD/VDD33PEX_RST PEX_CLKREQ PEX_REFCL