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你可能喜欢#本站首晒#原创新人# DELL 戴尔 ALIENWARE 外星人 17 R4 游戏笔记本_开箱晒物_什么值得买
#本站首晒#原创新人# DELL 戴尔 ALIENWARE 外星人 17 R4 游戏笔记本
小编注：双11买了不晒损失一半，#晒单大赛#活动火热来袭，剁过的手都开个箱吧！iPhoneX等好礼等你来赢，投稿即得额外100金币，还有原创新人独家奖励，App可光速投稿，详情。追加修改( 16:22:04):有些值友在留言栏问我不玩游戏为什么买这个笔电，回复总被吞楼 必须要为自己抱不平： 我玩游戏的！！！
LOL WOW 守望先锋，偶尔还玩暗黑3之类的， 我只是不会写专业的游戏测评.. 文尾说找游戏大腿为什么都没看见！ 气！&本篇晒物由以下几个部分组成：&（一） &背景介绍& (二) & 选购渠道以及过程& (三) & 开箱晒物以及简单评测&注：&关于电脑的拟人化称呼以及分辨法： 红色Rox& 辛普森頭基友机 &啥都没有RoxII&背景是床垫 手残留学党临时下了美图秀秀从白天扣到黑夜还是放弃了逼格毕竟个人能力有限，务实为主(一） 背景介紹&Rox&购买于 09/08/2012，那是经历了磨难（高考）后一个炎热的夏天。它是我人生中第一台笔电，当年在高三课堂上刷李毅吧（咦）时刷出来的网友晒单，炫（浮）酷（夸）的七彩键盘跑马灯和仿跑车引擎灯；17吋的笔电掀盖时那块纯黑的屏幕等都深深击碎了我‘再看看’的念头。已经忘了向父母费了多少口舌说了多少承诺，终于在一个月后如愿的拿到了这台底部有着定制铭牌，上面用‘外星语言’刻着自己名字的它。&所谓“来得早不如来得巧”就能大概的解释购买 RoxII&的购买原因。无非是因为&Rox&四年多以来日渐频繁的各种小毛病： 黑屏； 闪退； 卡顿掉帧.etc. &明年八月九号就是 Rox&来到我身边的第五个年头，也是DELL允许购买CC （complete cover，现在好像已经改叫 AD 也就是Accidental Damage）的最长时限， 为了减轻 Rox&的负担，让它陪伴我的时间长一些再长一些，于是快马加鞭的购买&RoxII&作为替代游戏主力机。（二）选购渠道以及过程&坐标： 澳大利亚 / 墨尔本&购买渠道： DELL au官网&那天去逛JB（咦） HIFI的时候看见样机，模板较之上一代 （详见：基友机）有了很大变化，大致原因应该是因为这一代机是DELL 第一代搭载VR功能的机器。实体看机的感觉还不错，回家就上网进入DELL澳洲官网找了个客服开始咨询更详细的配置以及价格，附上该型号的官网购买链接 ：&&报价及机器配置单如下：包括升级配置后的商品总价是4984刀（升级前顶配版为4014刀），正巧遇到年末（圣诞）促销，在官网与销售人员聊几句后对方给到百分之十的折扣：4486刀，折合人民币约为2W3人民币。图中可见商品价格（不含税）为4078刀，澳洲的税是百分之十，购买澳洲本地商品后持有购物小票60天内出境可退。其中升级配置为：&&（1）17.3 inch UHD (3840 x 2160) IPS Anti-Glare 300-nits Display with Tobii IR Eye-tracking （原配QHD屏，升级费149.6刀）&（2）512GB PCIe SSD (Boot) + 1TB 7200RPM SATA 6Gb/s (Storage)& （原配256GB+1T，升级费200刀）&（3）5Yr Premium Support: &（原配一年，升级费635.8刀）&如果有打算入手系列的值友，并且如果你像我一样的念旧和爱护自己的机器，在此真诚的安利直接购买五年CC（AD），一次性购买不仅优惠力度最大并且省心。& 其中UHD屏选配及版本国行暂未发售，据客服说明DELL应该会在12月中旬至月末推出 UHD屏与GeForce(R) GTX1080版，售价约为3W2人民币，是国行将会发售的最高版本。向澳洲客服咨询时，澳洲客服则表示从未听说澳洲可能会发行搭载 GeForce(R)GTX1080的版本。&比较讨厌的是没有其他颜色可以选，银色x黑色only，只能寄希望于以后会出好看的贴纸了& 澳洲的物流就是传说中的‘幽灵快递’。据说，只要在门铃响过三声而你却没有及时给出回应，就会落得极其凶残可怕令人发指的下场： 当你满心欢喜的推开门左顾右盼，门缝下的一张卡片告诉你.. 送货到家服务失败，请去附近站点自取，且过时不候。& 17号下的单，EDD是26号 （谢谢水印） 但当26号打开DELL官网查看 order details发现还卡在 In Transit的时候，我就已看淡了风云。28号收到短信通知， 29号收货。（三）开箱晒物及简单评测记得2012年的DELL箱子层层叠叠，立着有半人高（基友机版本也是如此）相比之下，这一代的外包装真的有很低调很节约，也抚平我一直脑补抱着大箱子被卡在电梯口的焦灼感。顺手撕掉的外包瓦楞纸手感很好，纵享丝滑，极大地美化了徒手拆快递的过程。徒手拆快递好像是每个女孩的被动技能，撕掉的那一条刚好露出&W A R，&配上LOGO很有智械战争的FEEL，也就本文的头图啦。全图为I7plus 所出，强迫症患者请避让图片里各种半途而废的马赛克和倾斜的角度与基友机的包装对比。只有一个大外星人LOGO的是基友机。VR机器和包装的特色就是高一头，全托了菊花口那条不明长条状物的福。外包装看起来新版的盒子有着新版的外星人字字体（屏幕上+1），但打开包装内盒里的盒子上却是旧版的烫金字：ALIENWARE 逼格更高。&作为一个忠实的WIN7用户（因为好奇心与创新精神随着年龄增大反比例缩小），初用WIN10真的觉得挺萌的。&鉴于我未曾入手12年之后的版本，仅与Rox&进行一系列对比。12年以后的外星人就取消了引擎灯，作为弥补给新版外星人都安装了一个会发光的触摸屏。键盘的粘合度很高，视觉效果上更利落完整，但对于游戏玩家来说，更短的键程和几乎消失的阻尼感会非常容易产生误按。乐观点想，这不失为一件好事：可以带动周边产业比如机械键盘的大力发展。原来的键盘灯是键帽上留了一圈白，所以透光性很好，新版的键盘（下）灯只能在黑暗环境下留存一分酷炫了。对比图中不难看出，新版外星人取消了转动轴下电脑主体上的一些快捷按钮，以及把 ALIENWARE 整个上移，这也是造成新旧版都是17吋但新版高出一个头的原因：给Tobii让道。 原有LOGO处肉眼可见两排x3个的小灯与一个红色圆灯可以侦测范围内的人眼，包括裸眼模式 模式与眼镜模式。配合ANLIENWARE tobii app可以自定义一些电源，触摸板，鼠标的小互动，比如侦测到人眼屏幕自动开启，和‘侦测到目光集中键盘区域则键盘背光灯自动亮起’，‘鼠标指针出现在注视的地方’等等。旧版外星人A面及C面都是采取类肤质材料，造就了冬暖夏凉的难忘手感。新版外星人A面采取了金属材质，C面是升级版的类肤质材料，手感更加细腻顺滑。外壳造型也从螃蟹壳变成了一交点三射线（我在说啥到底）。接线口分布详见图纸，数量基本没有变化只是改变了在机身上的位置。底部的改动比较大，原来的两个风扇口改成了一排散热栅栏，电池再也无法从外部肉眼可见（卸）。让人吐槽的必须是定制铭牌，多么光滑又空虚的底部设计，DELL你真的不觉得欠了点什么吗？历经千辛万苦下载了我唯一用过的评测软件：撸大湿&&接下来我们开始专业评测，嗯&&&总分14W3， 显卡（目测集显）输给了全国百分之五十七的朋友。&&&啊，真是好沉重的一个章节！&官方推荐的VR配件是HTC VIVE， 鉴于暂时没有硬性需求（在此提出胆小的人如何使用VR看电影是个需要思考的新社会问题，就只有我会担心当自己沉浸在VR世界里却忽略了现实世界里的动静吗，毕竟澳洲的入室抢劫也是很叼的，在此不表）估计在今年不会入手相关的设备。全文总结：&优点：&鉴于我不太玩大型游戏，这个时代的硬件更新换代速度又非常快，从而无法专业的谈论“硬件”。一些发烧机友最初购买它的原因是（几乎）所有配件都可以自己更换（定制型的DELL官网有售），到后期就是纯粹的习惯性（忠实）消費。非要总结，大概就是比它便宜的没它帅，有它帅的没它有内涵，比它又便宜又帅又有内涵的...嗯我也在等。缺点： 贵，重。 先不论机子本身价格，就官方建议配件HTC VIVE来说都是近七千块。再否定把这台笔电真的当做笔电来使用，4.5KG的重量如果跑通勤绝不是那么轻松。建议有经济能力但居无定所（比如在外留学党，外地工作租房党）的值友把它当做一台伪使用。购买建议：我不太会用海淘，但国内国外差价的确大，美淘澳淘就看值友们大显神通，但每个国家会有细微的硬件不同请留意。5年CC请狠下心来一步到位，如果哪天你不小心泼了咖啡在上面或者背着它摔了一跤，嗯你会来谢谢我的。感谢的话&这篇晒单因为时间关系以及个人能力关系（喔）目前仅局限于一些普通的晒以及评测，如果大家对比如Rox,&Tobii眼球追踪技术等相关讯息有兴趣，请在评论区留言喔。这是我在SMZDM上潜水两年后的第一篇晒单，从下午一直写到晚饭时间，从天亮写到天黑，希望大家言语温油，多多提意見，能让我有下次也打开电脑码字的勇气！&&希望大家都和我一样，在即将来临的17年里，旧的不去 新的也来。& 另： LOL，OW，国服澳服北美洲服有大腿吗 请私信我&& & 短腿神兽萌辣哩虾镇楼那边有个小馒头.jpgDoge同款表情精神污染中.avi小编注：为了感谢诸位值友的首晒热情，响应大家的呼声，该活动分裂出了门槛较低的子活动#本站首晒#！欢迎大家来分享本站还没晒过的好物，为值友提供更多购物参考！日更新：自咱们#首晒#活动上线后得到了诸多值友的大力支持，但是因为#首晒#的门槛较高，不少投稿的朋友们没能加上首晒的标签，为了感谢诸位值友的首晒热情，响应大家的呼声，该活动分裂出了门槛较低的子活动#本站首晒#！欢迎大家来分享本站还没晒过的好物，为值友提供更多购物参考！#本站首晒#| 赞10k 评论257 收藏355
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12345678PCB STACK UP8L DISLAYER 1 : TOP LAYER 2 : GNDAV02A/R01A DIS BLOCK DIAGRAMDDRIII-SODIMM1H=4mmLAYER 3 : IN1 LAYER 4 : VCC LAYER 5 : IN2 LAYER 6 : IN3 LAYER 7 : GND LAYER 8 : BOTDDRIII1333 MT/sCPUSandy Bridge 35W PGA 988PCIEx16ATIRobson XT(64bit) Seymour XT (64bit) Whistler LP (128bit) 29mm X 29mm BGA 969PAGE 18~22APAGE 16DDRIII-SODIMM2H=8mmDDRIII1333 MT/sPAGE 17PAGE 4~8FDI LINK2.5GT /sDMI LINK2.5GT /sINT HDMIDDR3 2GB 128Mx16bitx8PG 23,24LEVEL SHIFTERHDMI CONN PAGE 27 CRT BoardPAGE 27E-SATABSATA4 3G /SPAGE 28iGFX InterfacesINT CRTPAGE 26BINT Single CHANNEL LVDSSATA -HDD PAGE 31SATA0 6G /SLCD CONN1366 x 768 (HD) PAGE 25Mobile Intel Series 6 ChipsetESATA+USB2.0 PAGE 35USB Port x1 PAGE 29USB[2] USB[11] USB[8]ODD PAGE 36SATA1 6G /SUSB2.0USB[0]PCHSMBUSCamera PAGE 30USB[4] USB[5]Card Reader PAGE 30 RTL5128-GR3-axis Fall Sensor PAGE 31HM67 Couger Point BGA 989 25 mm X 25 mmPCI-EWLAN PAGE 34WWAN PAGE 35PCIE[2]PCI-EPCIE[1] PCIE[5]CKeyboard Conn. PAGE 42 Touch Pad PAGE 42LPCChargerPCIE[3]PAGE 49 PAGE 50 PAGE 51 PAGE 52 PAGE 53 PAGE 54CKBC ITE 8518PAGE 9~15 PAGE 32 SPIPWM FAN &Thermal PAGE 45 SPI ROM 512KB PAGE 41 SPI ROM 4MB PAGE 4125MHzLAN RealtekRTL8111ELUSB3.0 Controller PAGE 36 USB3.0 Ports x2 PAGE 373/5V 1.5V_SUS/0.75V_DDR 1.8V_RUN 1.05V_VTT/PCHIHDAPAGE 3925MHzIHDA32.768KHzRJ45 PAGE 39 Audio CodecIO BoardPAGE 33VCCSADGFX_COREPAGE 55DDALC 269 PAGE 38CPU_COREPAGE 56Speaker MB Side PAGE 38Jack X2 PAGE 38Digital-MIC PAGE 38Size Date: Document NumberQuanta Computer Inc.PROJECT : V02A/RO1ABLOCK DIAGRAMW ednesday, January 19, 20117Rev 1A 18Sheetof6112345612345678powerAAStateS0 S1 S3B BS4/S5 AC S4/S5 DC Only AC/DC No ExistC CSMBCLK SMBDATA SMB_CLK_ME1 SMB_DAT_ME1 AB1A_CLK AB1A_DATAD DQuanta Computer Inc.PROJECT : V02A/RO1ASize Date:1 2 3 4 5 6Document NumberPower RailsW ednesday, January 19, 20117Rev 1A 28Sheetof6154321DDCCBBAAQuanta Computer Inc.PROJECT : V02A/RO1ASize Date:5 4 3 2Document NumberBLANKW ednesday, January 19, 2011 Sheet1Rev 1A 3 of 6154321DP & PEG CompensationSandy Bridge Processor (DMI,PEG,FDI)U16AD+1.05V_PCH9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3 DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3 DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3 DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3B27 B25 A25 B24 B28 B26 A24 B23 G21 E22 F21 D21 G22 D22 F20 C21DMI_RX#[0] DMI_RX#[1] DMI_RX#[2] DMI_RX#[3] DMI_RX[0] DMI_RX[1] DMI_RX[2] DMI_RX[3] DMI_TX#[0] DMI_TX#[1] DMI_TX#[2] DMI_TX#[3] DMI_TX[0] DMI_TX[1] DMI_TX[2] DMI_TX[3]PEG_ICOMPI PEG_ICOMPO PEG_RCOMPO PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8] PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15] PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8] PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15] PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9] PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15] PEG_TX[0] PEG_TX[1] PEG_TX[2] PEG_TX[3] PEG_TX[4] PEG_TX[5] PEG_TX[6] PEG_TX[7] PEG_TX[8] PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15]J22 J21 H22 K33 M35 L34 J35 J32 H34 H31 G33 G30 F35 E34 E32 D33 D31 B33 C32 J33 L35 K34 H35 H32 G34 G31 F33 F30 E35 E33 F32 D34 E31 C33 B32 M29 M32 M31 L32 L29 K31 K28 J30 J28 H29 G27 E29 F27 D28 F26 E25 M28 M33 M30 L31 L28 K30 K27 J29 J27 H28 G28 E28 F28 D27 E26 D25PEG_COMPPEG_ICOMPO 12mil PEG_ICOMPI, PEG_RCOMPO 4mil,R21 PEG_RXN[0..15] 18 24.9/F_4 eDP_COMPDPCI EXPRESS* - GRAPHICSPEG_RXN0 PEG_RXN1 PEG_RXN2 PEG_RXN3 PEG_RXN4 PEG_RXN5 PEG_RXN6 PEG_RXN7 PEG_RXN8 PEG_RXN9 PEG_RXN10 PEG_RXN11 PEG_RXN12 PEG_RXN13 PEG_RXN14 PEG_RXN15 PEG_RXP0 PEG_RXP1 PEG_RXP2 PEG_RXP3 PEG_RXP4 PEG_RXP5 PEG_RXP6 PEG_RXP7 PEG_RXP8 PEG_RXP9 PEG_RXP10 PEG_RXP11 PEG_RXP12 PEG_RXP13 PEG_RXP14 PEG_RXP15 PEG_TXN0_C PEG_TXN1_C PEG_TXN2_C PEG_TXN3_C PEG_TXN4_C PEG_TXN5_C PEG_TXN6_C PEG_TXN7_C PEG_TXN8_C PEG_TXN9_C PEG_TXN10_C PEG_TXN11_C PEG_TXN12_C PEG_TXN13_C PEG_TXN14_C PEG_TXN15_C PEG_TXP0_C PEG_TXP1_C PEG_TXP2_C PEG_TXP3_C PEG_TXP4_C PEG_TXP5_C PEG_TXP6_C PEG_TXP7_C PEG_TXP8_C PEG_TXP9_C PEG_TXP10_C PEG_TXP11_C PEG_TXP12_C PEG_TXP13_C PEG_TXP14_C PEG_TXP15_C C487 C482 C478 C471 C467 C52 C45 C44 C43 C40 C38 C35 C30 C29 C27 C24 C488 C481 C477 C470 C466 C47 C46 C42 C41 C37 C36 C33 C32 C28 C26 C25 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4eDP_COMPIO and ICOMPO signals should be shorted near balls and routed within 500 milsDMI+1.05V_PCHR4724.9/F_4 PEG_COMPPEG_RXP[0..15] 18PEG_ICOMPI and RCOMPO signals should be routed within 500 mils PEG_ICOMPO signals should be routed within 500 milsCIntel(R) FDI9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9FDI_TXN0 FDI_TXN1 FDI_TXN2 FDI_TXN3 FDI_TXN4 FDI_TXN5 FDI_TXN6 FDI_TXN7 FDI_TXP0 FDI_TXP1 FDI_TXP2 FDI_TXP3 FDI_TXP4 FDI_TXP5 FDI_TXP6 FDI_TXP7 FDI_FSYNC0 FDI_FSYNC1 FDI_INT FDI_LSYNC0 FDI_LSYNC1A21 H19 E19 F18 B21 C20 D18 E17 A22 G19 E20 G18 B20 C19 D19 F17 J18 J17 H20 J19 H17FDI0_TX#[0] FDI0_TX#[1] FDI0_TX#[2] FDI0_TX#[3] FDI1_TX#[0] FDI1_TX#[1] FDI1_TX#[2] FDI1_TX#[3] FDI0_TX[0] FDI0_TX[1] FDI0_TX[2] FDI0_TX[3] FDI1_TX[0] FDI1_TX[1] FDI1_TX[2] FDI1_TX[3] FDI0_FSYNC FDI1_FSYNC FDI_INT FDI0_LSYNC FDI1_LSYNCCPEG_TXN[0..15] 18 PEG_TXN0 PEG_TXN1 PEG_TXN2 PEG_TXN3 PEG_TXN4 PEG_TXN5 PEG_TXN6 PEG_TXN7 PEG_TXN8 PEG_TXN9 PEG_TXN10 PEG_TXN11 PEG_TXN12 PEG_TXN13 PEG_TXN14 PEG_TXN15 PEG_TXP0 PEG_TXP1 PEG_TXP2 PEG_TXP3 PEG_TXP4 PEG_TXP5 PEG_TXP6 PEG_TXP7 PEG_TXP8 PEG_TXP9 PEG_TXP10 PEG_TXP11 PEG_TXP12 PEG_TXP13 PEG_TXP14 PEG_TXP15eDP Hot-plug (Disable)+1.05V_PCHR20 *10K_4_NC INT_eDP_HPDBeDP_ICOMPO 12mil eDP_COMPIO 4mileDP_COMP INT_eDP_HPDA18 A17 B16 C15 D15 C17 F16 C16 G15 C18 E16 D16 F15PEG_TXP[0..15] 18eDP_COMPIO eDP_ICOMPO eDP_HPD eDP_AUX eDP_AUX# eDP_TX[0] eDP_TX[1] eDP_TX[2] eDP_TX[3] eDP_TX#[0] eDP_TX#[1] eDP_TX#[2] eDP_TX#[3]CPU-989P-rPGACAD Note: Place PU resistor within 2 inches of CPU This signal can be left as no connect if entire eDP interface is disabled.BPrograming Disable eDP interface(BIOS)eDP0.22uF AC coupling Caps for PCIE GEN1/2/3AAQuanta Computer Inc.PROJECT : V02A/RO1ASize Date:5 4 3 2Document NumberSandy Bridge 1/5W ednesday, January 19, 2011 Sheet1Rev 1A 4 of 6154321Sandy Bridge Processor (CLK,MISC,JTAG)U16BSNB_IVB# N.A at SNB EDS #v1MISC12DH_SNB_IVB# H_CPUDET#H_SNB_IVB#C26 AN34PROC_SELECT# SKTOCC#CLOCKSBCLK BCLK#A28 A27R310 R306 R307 R311CLK_CPU_BCLKP 13 CLK_CPU_BCLKN 13 1K_4 *0_4_NC *0_4_NC 1K_432DPLL_REF_CLK DPLL_REF_CLK#A16 CLK_DP_P_R A15 CLK_DP_N_RCLK_DP_P 13 CLK_DP_N 13 +1.05V_PCHSchematic C/L_v1.0, P56 (PU,PD 1k/J) (Intel and PD3)Reserve (Intel confirm now)DAL33CATERR#32PECI_ECR7343_4THERMALAN33PECISM_DRAMRST#R8CPU_DRAMRST#32,44,47 IMVP7_PROCHOT#R7756/J_4H_PROCHOT#DDR3 MISCAL32PROCHOT#SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]AK1 A5 A4SM_RCOMP_0 R66 SM_RCOMP_1 R23 SM_RCOMP_2 R26140/F_4 25.5/F_4 200/F_4SM_RCOMP_0, SM_RCOMP_1 20mil SM_RCOMP_2 15mil,Over 130 degree C will drive low14 PM_THRMTRIP#AN32THERMTRIP#+1.05V_PCHPRDY# PREQ#AP29 AP27 AR26 AR27 AP30 AR28 AP26XDP_TCLK XDP_TMS XDP_TRST# XDP_TDI XDP_TDO +3.3V_RUN XDP_DBRST# R319 1K_4 XDP_TMS XDP_TDI XDP_TDO IMVP7_PROCHOT# XDP_TCLK R333 R328 R334 R76 R335 51/J_4 51/J_4 51/J_4 62/J_4CPWR MANAGEMENTJTAG & BPM9CH_PM_SYNCAM34PM_SYNCTCK TMS TRST# TDI TDOR32251/J_451/J_414 H_PW RGOOD R231 10K_4 SM_DRAMPW ROK R81 R82 *75_4_NCAP33UNCOREPWRGOODV8DBR# BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]AL35 AT28 AR29 AR30 AT30 AP32 AR31 AT31 AR32SM_DRAMPWROKXDP_DBRST# use a 1k pull-up to 3.3V_S TRST# use a 51ohm pull down.+1.05V_PCH CPU_PLTRST#*43/J_4_NC CPU_PLTRST#_R AR33RESET#When MP, JTAG PU/PD resistor can be removed? Need to confirm with IntelCPU_PLTRSTR497,R126 POP NCU19,C544,R81,R82 NC POPU19+3.3V_SUS CPU-989P-rPGA C544 *0.1U/10V_NCOption1 Option2BootS3S3 RSM112,18,32,33,35 PLTRST#BNC VCC IN GND OUT52 3R497 1.5K4CPU_PLTRST#+1.5V_CPU DRAM_PWRGD SYS_PWROK SM_DRAMPWROK 100 ns after +1.5V_CPU reaches 80%B*74LVC1G07GW _NCCPU_PLTRST#_RIN L HOUT L High-ZR126 750/FFollow #DG1.0 7 DRAMRST# Routing Illustration+1.5V_SUSChange OD part same with PDC Copy from PDC+3.3V_SUSR51 1K/F_4 R45 1K/F_4 DDR3_DRAMRST#_RQ2 2N7002W -7-FPin1 L+1.5V_CPU C156 0.1U/10VPin2 L H L HPin4 L L L H16,17 DDR3_DRAMRST#31CPU_DRAMRST#L H H13 DDR_HVREF_RST_PCH C39 0.047U/10V2R43 4.99K/F_4AAR118 200_45U4R109 200/F_49 PM_DRAM_PW RGD 9 SYS_PW ROK2 4 1SM_DRAMPW ROK_R R108 130/F_4 SM_DRAMPW ROKQuanta Computer Inc.R110374AHC1G09GW3 *39_NC 2Q101PROJECT : V02A/RO1A*2N7002K_NC PS_S3CNTRL 7,16 Date: Size Document NumberFollow #DG1.0 5 DDR Power Gating Topology5 4Sandy Bridge 2/5W ednesday, January 19, 2011 Sheet1Rev 1A 5 of 613254321Sandy Bridge Processor (DDR3)U16D U16CD16 M_A_DQ[63:0]CBM_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63C5 D5 D3 D2 D6 C6 C2 C3 F10 F8 G10 G9 F9 F7 G8 G7 K4 K5 K1 J1 J5 J4 J2 K2 M8 N10 N8 N7 M10 M9 N9 M7 AG6 AG5 AK6 AK5 AH5 AH6 AJ5 AJ6 AJ8 AK8 AJ9 AK9 AH8 AH9 AL9 AL8 AP11 AN11 AL12 AM12 AM11 AL11 AP12 AN12 AJ14 AH14 AL15 AK15 AL14 AK14 AJ15 AH15SA_DQ[0] SA_DQ[1] SA_DQ[2] SA_DQ[3] SA_DQ[4] SA_DQ[5] SA_DQ[6] SA_DQ[7] SA_DQ[8] SA_DQ[9] SA_DQ[10] SA_DQ[11] SA_DQ[12] SA_DQ[13] SA_DQ[14] SA_DQ[15] SA_DQ[16] SA_DQ[17] SA_DQ[18] SA_DQ[19] SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]SA_CLK[0] SA_CLK#[0] SA_CKE[0]AB6 AA6 V917 M_B_DQ[63:0] M_A_CLKP0 16 M_A_CLKN0 16 M_A_CKE0 16 M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63SA_CLK[1] SA_CLK#[1] SA_CKE[1]AA5 AB5 V10M_A_CLKP1 16 M_A_CLKN1 16 M_A_CKE1 16RSVD_TP[1] RSVD_TP[2] RSVD_TP[3]AB4 AA4 W9RSVD_TP[4] RSVD_TP[5] RSVD_TP[6]AB3 AA3 W10SA_CS#[0] SA_CS#[1] RSVD_TP[7] RSVD_TP[8]AK3 AL3 AG1 AH1M_A_CS#0 16 M_A_CS#1 16DDR SYSTEM MEMORY ASA_ODT[0] SA_ODT[1] RSVD_TP[9] RSVD_TP[10]AH3 AG3 AG2 AH2M_A_ODT0 16 M_A_ODT1 16SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]C4 G6 J3 M6 AL6 AM8 AR12 AM15M_A_DQSN0 M_A_DQSN1 M_A_DQSN2 M_A_DQSN3 M_A_DQSN4 M_A_DQSN5 M_A_DQSN6 M_A_DQSN7M_A_DQSN[7:0] 16SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]D4 F6 K3 N6 AL5 AM9 AR11 AM14M_A_DQSP0 M_A_DQSP1 M_A_DQSP2 M_A_DQSP3 M_A_DQSP4 M_A_DQSP5 M_A_DQSP6 M_A_DQSP7M_A_DQSP[7:0] 1616 16 16M_A_BS0 M_A_BS1 M_A_BS2AE10 AF10 V6SA_BS[0] SA_BS[1] SA_BS[2]16 16 16M_A_CAS# M_A_RAS# M_A_W E#AE8 AD9 AF9SA_CAS# SA_RAS# SA_WE#SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8] SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]AD10 W1 W2 W7 V3 V2 W3 W6 V1 W5 AD8 V4 W4 AF8 V5 V7M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15M_A_A[15:0] 16C9 A7 D10 C8 A9 A8 D9 D8 G4 F4 F1 G1 G5 F5 F2 G2 J7 J8 K10 K9 J9 J10 K8 K7 M5 N4 N2 N1 M4 N5 M2 M1 AM5 AM6 AR3 AP3 AN3 AN2 AN1 AP2 AP5 AN9 AT5 AT6 AP6 AN8 AR6 AR5 AR9 AJ11 AT8 AT9 AH11 AR8 AJ12 AH12 AT11 AN14 AR14 AT14 AT12 AN15 AR15 AT15SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]SB_CLK[0] SB_CLK#[0] SB_CKE[0]AE2 AD2 R9M_B_CLKP0 17 M_B_CLKN0 17 M_B_CKE0 17DSB_CLK[1] SB_CLK#[1] SB_CKE[1]AE1 AD1 R10M_B_CLKP1 17 M_B_CLKN1 17 M_B_CKE1 17RSVD_TP[11] RSVD_TP[12] RSVD_TP[13]AB2 AA2 T9RSVD_TP[14] RSVD_TP[15] RSVD_TP[16]AA1 AB1 T10SB_CS#[0] SB_CS#[1] RSVD_TP[17] RSVD_TP[18]AD3 AE3 AD6 AE6M_B_CS#0 17 M_B_CS#1 17CDDR SYSTEM MEMORY BSB_ODT[0] SB_ODT[1] RSVD_TP[19] RSVD_TP[20]AE4 AD4 AD5 AE5M_B_ODT0 17 M_B_ODT1 17SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]D7 F3 K6 N3 AN5 AP9 AK12 AP15M_B_DQSN0 M_B_DQSN1 M_B_DQSN2 M_B_DQSN3 M_B_DQSN4 M_B_DQSN5 M_B_DQSN6 M_B_DQSN7M_B_DQSN[7:0] 17SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]C7 G3 J6 M3 AN6 AP8 AK11 AP14M_B_DQSP0 M_B_DQSP1 M_B_DQSP2 M_B_DQSP3 M_B_DQSP4 M_B_DQSP5 M_B_DQSP6 M_B_DQSP7M_B_DQSP[7:0] 17B17 17 17M_B_BS0 M_B_BS1 M_B_BS2AA9 AA7 R6SB_BS[0] SB_BS[1] SB_BS[2]17 17 17M_B_CAS# M_B_RAS# M_B_W E#AA10 AB8 AB9SB_CAS# SB_RAS# SB_WE#SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8] SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]AA8 T7 R7 T6 T2 T4 T3 R2 T5 R3 AB7 R1 T1 AB10 R5 R4M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15M_B_A[15:0] 17CPU-989P-rPGA CPU-989P-rPGAA AQuanta Computer Inc.PROJECT : V02A/RO1ASize Date:5 4 3 2Document NumberSandy Bridge 3/5W ednesday, January 19, 2011 Sheet1Rev 1A 6 of 6154321Sandy Bridge Processor (POWER)CPU VTTSNB 35W:8.5AU16FSandy Bridge Processor (GRAPHIC POWER)CPU VGTSNB 35W:22A 10uF x 12+VCC_GFX_CORE AT24 AT23 AT21 AT20 AT18 AT17 AR24 AR23 AR21 AR20 AR18 AR17 AP24 AP23 AP21 AP20 AP18 AP17 AN24 AN23 AN21 AN20 AN18 AN17 AM24 AM23 AM21 AM20 AM18 AM17 AL24 AL23 AL21 AL20 AL18 AL17 AK24 AK23 AK21 AK20 AK18 AK17 AJ24 AJ23 AJ21 AJ20 AJ18 AJ17 AH24 AH23 AH21 AH20 AH18 AH17 U16GPOWER10F x12POWERTP3SENSE LINESR317 VAXG_SENSE VSSAXG_SENSE AK35 AK34 R318 TP2100_4 100_4+VCC_CORE +1.05V_PCH VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50 VCC51 VCC52 VCC53 VCC54 VCC55 VCC56 VCC57 VCC58 VCC59 VCC60 VCC61 VCC62 VCC63 VCC64 VCC65 VCC66 VCC67 VCC68 VCC69 VCC70 VCC71 VCC72 VCC73 VCC74 VCC75 VCC76 VCC77 VCC78 VCC79 VCC80 VCC81 VCC82 VCC83 VCC84 VCC85 VCC86 VCC87 VCC88 VCC89 VCC90 VCC91 VCC92 VCC93 VCC94 VCC95 VCC96 VCC97 VCC98 VCC99 VCC100 VCCIO1 VCCIO2 VCCIO3 VCCIO4 VCCIO5 VCCIO6 VCCIO7 VCCIO8 VCCIO9 VCCIO10 VCCIO11 VCCIO12 VCCIO13 VCCIO14 VCCIO15 VCCIO16 VCCIO17 VCCIO18 VCCIO19 VCCIO20 VCCIO21 VCCIO22 VCCIO23 VCCIO24 VCCIO25 VCCIO26 VCCIO27 VCCIO28 VCCIO29 VCCIO30 VCCIO31 VCCIO32 VCCIO33 VCCIO34 VCCIO35 VCCIO36 VCCIO37 VCCIO38 VCCIO39 VCCIO40 AH13 AH10 AG10 AC10 Y10 U10 P10 L10 J14 J13 J12 J11 H14 H12 H11 G14 G13 G12 F14 F13 F12 F11 E14 E12 E11 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11 J23DSNB 35W:55A 10uF x 24VREFCPU Core PowerC150C135C490C500C499C498C484PEG AND DDR10U/10V/V/V/V/V/V/V/0805C505C489C474C483C473C497C50210U/10V/V/V/V/V/V/V/0805CC60 C491 10U/6.3V_6 10U/4V_6C475 10U/4V_6C56 C58 10U/6.3V_6 10U/6.3V_61.8V RAILC57 C59 C492 10U/6.3V_6 10U/6.3V_6 10U/4V_6C485 10U/4V_6C476 10U/4V_6BSENSE LINESAG35 AG34 AG33 AG32 AG31 AG30 AG29 AG28 AG27 AG26 AF35 AF34 AF33 AF32 AF31 AF30 AF29 AF28 AF27 AF26 AD35 AD34 AD33 AD32 AD31 AD30 AD29 AD28 AD27 AD26 AC35 AC34 AC33 AC32 AC31 AC30 AC29 AC28 AC27 AC26 AA35 AA34 AA33 AA32 AA31 AA30 AA29 AA28 AA27 AA26 Y35 Y34 Y33 Y32 Y31 Y30 Y29 Y28 Y27 Y26 V35 V34 V33 V32 V31 V30 V29 V28 V27 V26 U35 U34 U33 U32 U31 U30 U29 U28 U27 U26 R35 R34 R33 R32 R31 R30 R29 R28 R27 R26 P35 P34 P33 P32 P31 P30 P29 P28 P27 P26C130 C472 C68 C22 C479 C465 C480C496C139C49510U/10V/V_6 10U/10V/V/V/V/V/V/ C129 C15210U/10V/V_6GRAPHICS10U/10V/V/V/V/0805DDR3 -1.5V RAILSC161C469C53C16C55C54C18 C131 C102 10U/6.3V_6 C97 10U/6.3V_6 C494 10U/10V/V/080510U/10V/V/V/V/V/V/0805SA RAILVAXG1 VAXG2 VAXG3 VAXG4 VAXG5 VAXG6 VAXG7 VAXG8 VAXG9 VAXG10 VAXG11 VAXG12 VAXG13 VAXG14 VAXG15 VAXG16 VAXG17 VAXG18 VAXG19 VAXG20 VAXG21 VAXG22 VAXG23 VAXG24 VAXG25 VAXG26 VAXG27 VAXG28 VAXG29 VAXG30 VAXG31 VAXG32 VAXG33 VAXG34 VAXG35 VAXG36 VAXG37 VAXG38 VAXG39 VAXG40 VAXG41 VAXG42 VAXG43 VAXG44 VAXG45 VAXG46 VAXG47 VAXG48 VAXG49 VAXG50 VAXG51 VAXG52 VAXG53 VAXG54+VCC_GFX_CORE VCC_AXG_SENSE 47 VSS_AXG_SENSE 47DSM_VREFAL1+VDDR_REF_CPU+VDDR_REF_CPUCAD Note: +VDDR_REF_CPU should have 10 mil trace widthCPU MCHSNB 35W: 5A 10uF x 6VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 AF7 AF4 AF1 AC7 AC4 AC1 Y7 Y4 Y1 U7 U4 U1 P7 P4 P1 +1.5V_CPU C100 10U/6.3V_6 C99 10U/6.3V_6 C50 10U/6.3V_6 C51 10U/6.3V_6C76 10U/6.3V_6C98 10U/6.3V_6CCORE SUPPLYVCCSA1 VCCSA2 VCCSA3 VCCSA4 VCCSA5 VCCSA6 VCCSA7 VCCSA8M27 M26 L26 J26 J25 J24 H26 H25+VCCSA_CORE C49 10U/6.3V_6 C48 10U/6.3V_6 C468 10U/4V_6CPU SASNB35W: 6A 10uF x 3SVIDCPU VCCPLVIDALERT# VIDSCLK VIDSOUT AJ29 AJ30 AJ28 H_CPU_SVIDALRT# H_CPU_SVIDCLK H_CPU_SVIDDATSNB 35W:3A 10uF x 1 1uF x 2VCCPLL1 VCCPLL2 VCCPLL3MISC+1.8V_RUNB6 A6 A2 C17 10U/6.3V_6 C19 1U/6.3V C23 1U/6.3VVCCSA_SENSEH23VCCSA_SENSE 49FC_C22 VCCSA_VID1C22 C24VCCSA_VID0 VCCSA_VID1VCCSA_VID1 49CPU-989P-rPGA VCCSA_VID0 VCCSA_VID1 R19 R16 R15 1 1 1 2 10K/F_4 2 *10K/F_4_NC 2 10K/F_4 +1.05V_PCHB+5V_ALW 1+15V_ALW+1.5V_SUSS3 Power reduceR88 10K_4 R67 100K_4 PS_S3CNTRL 5,16 PS_S3CNTRL_S10A Q3+1.5V_CPUFDMS76709 8 7 6 5 4 3 2 1 R65 *220_NCVCC_SENSE VSS_SENSEAJ35 AJ34 R316 100_432R315100_4+VCC_CORE VCCSENSE 47 VSSSENSE 47VCCIO_SENSE VSSIO_SENSER80 *10K_4_NC1Q7 2N7002W-7-F13B10 A10VCCIO_SENSE 48 VSSIO_SENSE 489,32,46 SIO_SLP_S3#2 2 Q6 2N7002W-7-F C116 *0.01U/25V/X7R_4_NC C77
2 PS_S3CNTRL3PS_S3CNTRL_SQ4 *2N7002W-7-F_NCTake care Q3509 Vgs(MAX)=2.5+DDR_VTTREF CPU-989P-rPGA +VDDR_REF_CPU +1.5V_CPUChange R, R to +/-5%54.9 ohm has no 5%AR69*0_8_NCR3621 1K/F_43 +1.5V_SUS C89 C65 C83 C69 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V +1.5V_CPU Q5 *2N7002W-7-F_NC 2 PS_S3CNTRL_S1ASVID CLK Layout note: need routing together and ALERT need between CLK and DATAH_CPU_SVIDCLK SJ_ 1 +1.05V_PCHPlace PU resistor close to CPU+1.05V_PCH +1.05V_PCHSVID DATA Close to VRPlace PU resistor close to CPU+1.05V_PCHR68 1K/F_4C113 0.1U/10VClose to VRR89 54.9/F_4 1 R90 VR_SVID_CLK 47SVID ALERTR93 75_4 H_CPU_SVIDALRT# R94 43_4 VR_SVID_ALERT# 47R96 130_4 H_CPU_SVIDDAT SJ_ 1 1 R97R101 130_4 VR_SVID_DATA 47Quanta Computer Inc.PROJECT :V02A/RO1ASize Date: Document NumberSandy Bridge 4/5Wednesday, January 19, 20111Rev 1A 7 of 61Sheet543254321Sandy Bridge Processor (GND)U16H U16ISandy Bridge Processor (RESERVED, CFG)U16EDCBAT35 AT32 AT29 AT27 AT25 AT22 AT19 AT16 AT13 AT10 AT7 AT4 AT3 AR25 AR22 AR19 AR16 AR13 AR10 AR7 AR4 AR2 AP34 AP31 AP28 AP25 AP22 AP19 AP16 AP13 AP10 AP7 AP4 AP1 AN30 AN27 AN25 AN22 AN19 AN16 AN13 AN10 AN7 AN4 AM29 AM25 AM22 AM19 AM16 AM13 AM10 AM7 AM4 AM3 AM2 AM1 AL34 AL31 AL28 AL25 AL22 AL19 AL16 AL13 AL10 AL7 AL4 AL2 AK33 AK30 AK27 AK25 AK22 AK19 AK16 AK13 AK10 AK7 AK4 AJ25VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80VSSVSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160AJ22 AJ19 AJ16 AJ13 AJ10 AJ7 AJ4 AJ3 AJ2 AJ1 AH35 AH34 AH32 AH30 AH29 AH28 AH26 AH25 AH22 AH19 AH16 AH7 AH4 AG9 AG8 AG4 AF6 AF5 AF3 AF2 AE35 AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE9 AD7 AC9 AC8 AC6 AC5 AC3 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 Y9 Y8 Y6 Y5 Y3 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 U9 U8 U6 U5 U3 U2T35 T34 T33 T32 T31 T30 T29 T28 T27 T26 P9 P8 P6 P5 P3 P2 N35 N34 N33 N32 N31 N30 N29 N28 N27 N26 M34 L33 L30 L27 L9 L8 L6 L5 L4 L3 L2 L1 K35 K32 K29 K26 J34 J31 H33 H30 H27 H24 H21 H18 H15 H13 H10 H9 H8 H7 H6 H5 H4 H3 H2 H1 G35 G32 G29 G26 G23 G20 G17 G11 F34 F31 F29VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192 VSS193 VSS194 VSS195 VSS196 VSS197 VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210 VSS211 VSS212 VSS213 VSS214 VSS215 VSS216 VSS217 VSS218 VSS219 VSS220 VSS221 VSS222 VSS223 VSS224 VSS225 VSS226 VSS227 VSS228 VSS229 VSS230 VSS231 VSS232 VSS233VSSVSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245 VSS246 VSS247 VSS248 VSS249 VSS250 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS258 VSS259 VSS260 VSS261 VSS262 VSS263 VSS264 VSS265 VSS266 VSS267 VSS268 VSS269 VSS270 VSS271 VSS272 VSS273 VSS274 VSS275 VSS276 VSS277 VSS278 VSS279 VSS280 VSS281 VSS282 VSS283 VSS284 VSS285F22 F19 E30 E27 E24 E21 E18 E15 E13 E10 E9 E8 E7 E6 E5 E4 E3 E2 E1 D35 D32 D29 D26 D20 D17 C34 C31 C28 C27 C25 C23 C10 C1 B22 B19 B17 B15 B13 B11 B9 B8 B7 B5 B3 B2 A35 A32 A29 A26 A23 A20 A3CFG2 TP8 TP1 TP5 TP6AK28 AK29 AL26 AL27 AK26 AL29 AL30 AM31 AM32 AM30 AM28 AM26 AN28 AN31 AN26 AM27 AK31 AN29CFG[0] CFG[1] CFG[2] CFG[3] CFG[4] CFG[5] CFG[6] CFG[7] CFG[8] CFG[9] CFG[10] CFG[11] CFG[12] CFG[13] CFG[14] CFG[15] CFG[16] CFG[17]RSVD28 RSVD29 RSVD30 RSVD31 RSVD32 RSVD33 RSVD34 RSVD35L7 AG7 AE7 AK2 W8 AT26 AM33 AJ27DRSVD37 RSVD38 RSVD39 RSVD40T8 J16 H16 G16AJ31 AH31 AJ33 AH33 AJ26VAXG_VAL_SENSE VSSAXG_VAL_SENSE VCC_VAL_SENSE VSS_VAL_SENSE RSVD5RSVD41 RSVD42 RSVD43 RSVD44 RSVD45AR35 AT34 AT33 AP35 AR34RESERVED16 SMDDR_VREF_DQ0_M3 17 SMDDR_VREF_DQ1_M3B4 D1RSVD6 RSVD7RSVD46 RSVD47 RSVD48 RSVD49 RSVD50B34 A33 A34 B35 C35CR31 R33 F25 *1K/J_4_NC *1K/J_4_NCF24 F23 D24 G25 G24 E23 D23 C30 A31 B30 B29 D30 B31 A30 C29RSVD8 RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 RSVD21 RSVD22 RSVD23 RSVD24 RSVD25 VCCIO_SEL RSVD27RSVD51 RSVD52AJ32 AK32VCC_DIE_SENSEAH27RSVD54 RSVD55AN35 AM35#27636 SNB EDS0.7v1 no function.AT2 AT1 AR1+3.3V_RUNR309 2*10K_4_NC 1J20 B18 A19 J15check pull high voltage #439028 PDDG p127RSVD56 RSVD57 RSVD58KEYB1BCPU-989P-rPGAFor rPGA socket, RSVD59 pin should be left NCCFG[6:5] (PCIE Port Bifurcation Straps)11: 10: 01: 00: (Default) x16 - Device 1 functions 1 and 2 disabled x8, x8 - Device 1 function 1 function 2 disabled Reserved - (Device 1 function 1 function 2 enabled) x8,x4,x4 - Device 1 functions 1 and 2 enabledCPU-989P-rPGACPU-989P-rPGAProcessor StrappingAThe CFG signals have a default value of '1' if not terminated on the board.CFG2R1061K/F_41 CFG2 (PCI-E Static x16 Lane Reversal) CFG3 (PCI-E Static x4 Lane Reversal) CFG4 (DP Presence Strap)5 40 Lane Reversed Lane Reversed E An ext DP device is connected to eDP2ANormal Operation Normal Operation D No physical DP attached to eDP3Quanta Computer Inc.PROJECT : V02A/RO1ASize Date: Document NumberSandy Bridge 5/5W ednesday, January 19, 2011 Sheet1Rev 1A 8 of 6154321Cougar Point (DMI,FDI,PM)U26C 4 4 4 4DPCH Pull-high/low(CLG)+3.3V_SUS FDI_TXN0 FDI_TXN1 FDI_TXN2 FDI_TXN3 FDI_TXN4 FDI_TXN5 FDI_TXN6 FDI_TXN7 FDI_TXP0 FDI_TXP1 FDI_TXP2 FDI_TXP3 FDI_TXP4 FDI_TXP5 FDI_TXP6 FDI_TXP7 FDI_INT 4 4 4 4 4 CLKRUN# SYS_RESET# R433 R410 8.2K/J_4 8.2K/J_4 +3.3V_RUN 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3 DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3 DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3 DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3BC24 BE20 BG18 BG20 BE24 BC20 BJ18 BJ20 AW24 AW20 BB18 AV18 AY24 AY20 AY18 AU18 BJ24DMI0RXN DMI1RXN DMI2RXN DMI3RXN DMI0RXP DMI1RXP DMI2RXP DMI3RXP DMI0TXN DMI1TXN DMI2TXN DMI3TXN DMI0TXP DMI1TXP DMI2TXP DMI3TXP DMI_ZCOMP DMI_IRCOMP DMI2RBIAS4 4 4 4 4 4 4 4 4 4 4 4FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7 FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6 FDI_RXP7 FDI_INT FDI_FSYNC0 FDI_FSYNC1 FDI_LSYNC0 FDI_LSYNC1BJ14 AY14 BE14 BH13 BC12 BJ12 BG10 BG9 BG14 BB14 BF14 BG13 BE12 BG12 BJ10 BH9 AW16 AV12 BC10 AV14 BB10PM_RI# PM_BATLOW # PCIE_W AKE#R448 R421 R43810K_4 8.2K/J_4 10K_4D10k, Follow HR_DG_v1.0 P200(Intel)ME_SUS_PW R_ACK AC_PRESENT SIO_SLP_LAN# R444 R459 R226 10K_4 10K_4 10K_4DMIFDIFDI_FSYNC0 FDI_FSYNC1 FDI_LSYNC0 FDI_LSYNC1DMI_ZCOMP, DMI_IRCOMP 4mil+1.05V_PCHR248 R24749.9/F_4 DMI_COMP 750/F_4 DMI2RBIASBG25 BH21DSWVRMENA18 DSW VRMENRSMRST# R464 R402 10K_4 10K_4CME_SUS_PW R_ACKCSystem Power ManagementC12 K3SUSACK# SYS_RESET# SYS_PWROK PWROK APWROK DRAMPWROK RSMRST#DPWROK WAKE# CLKRUN# / GPIO32 SUS_STAT# / GPIO61 SUSCLK / GPIO62 SLP_S5# / GPIO63 SLP_S4#E22 RSMRST#SYS_PW ROK_RSYS_RESET# SYS_PW ROKB9 N3 G8PCIE_W AKE# CLKRUN#PCIE_W AKE# 33,35 CLKRUN# 321 R403 1 1 R400 1 1 R401 1SYS_PW ROK_R P12 2 2 SJ_0402 PW ROK_R 2 2 SJ_0402 APW ROK_R 2 2 SJ_0402+3VTake care of timing32 EC_PW ROK 32,40,41 HW PG 5 PM_DRAM_PW RGD 32 RSMRST#L22 L10 B13+3V_S5TP18+RTC_CELL+3V_S5 +3V_S5N14 SUSCLK D10 H4 F4 G10 G16SLP_S4#TP9 SIO_SLP_S5# 32 T31 R456 330K_4 DSW VRMEN R457 *330K/J_4_NCRSMRST# ME_SUS_PW R_ACKC21 K16 E20W/O support32 ME_SUS_PW R_ACK 32 SIO_PW RBTN# 32 AC_PRESENTBSUSWARN#/SUSPWRDNACK/GPIO30 PWRBTN#+3V_S5 SLP_S3#SLP_A#SIO_SLP_S3# 7,32,46DSW DSWW/O support iAMT W/O support Deep SxAC_PRESENT PM_BATLOW # PM_RI#H20 E10 A10ACPRESENT / GPIO31SLP_SUS# PMSYNCH SLP_LAN# / GPIO29On Die DSW VR EnableH_PM_SYNC T25 5BATLOW# / GPIO72 +3V_S5 RI#CougarPoint_R1P0AP14 K14 SIO_SLP_LAN#BHigh = Enable (Default) Low = Disable+3V_S5W/O support iAMTSystem PWR_OK(CLG)+3.3V_SUScheck use IMVP_PWRGD to enable SYS_PWROKC601 0.1U/10V U25A525 SYS_PW ROK SYS_PW ROK4 1 3TC7SH08FU EC_PW ROKIMVP_PW RGD 32,47AR399 100K_4Quanta Computer Inc.PROJECT : V02A/RO1ASize Date: Document NumberCougar Point 1/7W ednesday, January 19, 2011 Sheet1Rev 1A 9 of 61543254321Cougar Point (LVDS,DDI)U26I U26D 32 PANEL_BKEN 32 ENVDD 25DCougar Point (GND)U26HH5 J47 M45 P45LCD_DDCCLK LCD_DDCDAT DIS_L_CTRL_CLK DIS_L_CTRL_DATA R259 T26L_BKLTEN L_VDD_EN L_BKLTCTL L_DDC_CLK L_DDC_DATA L_CTRL_CLK L_CTRL_DATA LVD_IBG LVD_VBG LVD_VREFH LVD_VREFL LVDSA_CLK# LVDSA_CLK LVDSA_DATA#0 LVDSA_DATA#1 LVDSA_DATA#2 LVDSA_DATA#3 LVDSA_DATA0 LVDSA_DATA1 LVDSA_DATA2 LVDSA_DATA3 LVDSB_CLK# LVDSB_CLK LVDSB_DATA#0 LVDSB_DATA#1 LVDSB_DATA#2 LVDSB_DATA#3 LVDSB_DATA0 LVDSB_DATA1 LVDSB_DATA2 LVDSB_DATA3SDVO_TVCLKINN SDVO_TVCLKINP SDVO_STALLN SDVO_STALLP SDVO_INTN SDVO_INTPAP43 AP45 AM42 AM40 AP39 AP40BIA_PW M25 LCD_DDCCLK 25 LCD_DDCDATT40 K47 T45 P392.37K/F_4 LVDS_IBG AF37 LVDS_VBG AF36SDVO_CTRLCLK SDVO_CTRLDATA DDPB_AUXN DDPB_AUXP DDPB_HPDP38 M39 AT49 AT47 AT40 AV42 AV40 AV45 AV46 AU48 AU47 AV47 AV49 P46 P42 AP47 AP49 AT38 AY47 AY49 AY43 AY45 BA47 BA48 BB47 BB49 M43 M36 AT45 AT43 BH41 BB43 BB45 BF44 BE44 BF42 BE42 BJ42 BG42HDMI_SCL 27 HDMI_SDA 27AE48 AE47 AK39 AK40 AN48 AM47 AK47 AJ48 AN47 AM49 AK49 AJ47 AF40 AF39 AH45 AH47 AF49 AF45 AH43 AH49 AF47 AF43INT_DP_HPD27 27 27 27 27 27 27 27 27LVDS25 INT_TXLCLKOUTN 25 INT_TXLCLKOUTP 25 INT_TXLOUTN0 25 INT_TXLOUTN1 25 INT_TXLOUTN2 25 INT_TXLOUTP0 25 INT_TXLOUTP1 25 INT_TXLOUTP2Digital Display InterfaceDDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P DDPC_CTRLCLK DDPC_CTRLDATA DDPC_AUXN DDPC_AUXP DDPC_HPD DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P DDPD_CTRLCLK DDPD_CTRLDATAINT_HDMI_TXN2 INT_HDMI_TXP2 INT_HDMI_TXN1 INT_HDMI_TXP1 INT_HDMI_TXN0 INT_HDMI_TXP0 INT_HDMI_TXCN INT_HDMI_TXCPC26 INT_CRT_BLU 26 INT_CRT_GRE 26 INT_CRT_RED 26 26 INT_DDCCLK INT_DDCDATINT_CRT_BLU N48 INT_CRT_GRE P49 INT_CRT_RED T49CRT_BLUE CRT_GREEN CRT_REDT39 M40 M47 M49 T43 T42CRT_DDC_CLK CRT_DDC_DATA CRT_HSYNC CRT_VSYNC DAC_IREF CRT_IRTNCougarPoint_R1P0DDPD_AUXN DDPD_AUXP DDPD_HPD DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3PINT_CRT_HSYNC_R INT_CRT_VSYNC_R DAC_IREFBR272 1K_426 INT_CRT_HSYNC 26 INT_CRT_VSYNCR495 R49920/F_4 INT_CRT_HSYNC_R 20/F_4 INT_CRT_VSYNC_RR492 C637 R493 C638 R494 C639R place close to PCH150/F_4 22P 150/F_4 22P 150/F_4 22PINT_CRT_BLU INT_CRT_GREINT_CRT_RED+3.3V_RUN LCD_DDCDAT LCD_DDCCLK DIS_L_CTRL_CLK DIS_L_CTRL_DATA R498 R267 R273 R274 2.2K_4 2.2K_4 2.2K_4 2.2K_4AENVDDR271 21 100K_4AY4 AY42 AY46 AY8 B11 B15 B19 B23 B27 B31 B35 B39 B7 F45 BB12 BB16 BB20 BB22 BB24 BB28 BB30 BB38 BB4 BB46 BC14 BC18 BC2 BC22 BC26 BC32 BC34 BC36 BC40 BC42 BC48 BD46 BD5 BE22 BE26 BE40 BF10 BF12 BF16 BF20 BF22 BF24 BF26 BF28 BD3 BF30 BF38 BF40 BF8 BG17 BG21 BG33 BG44 BG8 BH11 BH15 BH17 BH19 H10 BH27 BH31 BH33 BH35 BH39 BH43 BH7 D3 D12 D16 D18 D22 D24 D26 D30 D32 D34 D38 D42 D8 E18 E26 G18 G20 G26 G28 G36 G48 H12 H18 H22 H24 H26 H30 H32 H34 F3VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180] VSS[181] VSS[182] VSS[183] VSS[184] VSS[185] VSS[186] VSS[187] VSS[188] VSS[189] VSS[190] VSS[191] VSS[192] VSS[193] VSS[194] VSS[195] VSS[196] VSS[197] VSS[198] VSS[199] VSS[200] VSS[201] VSS[202] VSS[203] VSS[204] VSS[205] VSS[206] VSS[207] VSS[208] VSS[209] VSS[210] VSS[211] VSS[212] VSS[213] VSS[214] VSS[215] VSS[216] VSS[217] VSS[218] VSS[219] VSS[220] VSS[221] VSS[222] VSS[223] VSS[224] VSS[225] VSS[226] VSS[227] VSS[228] VSS[229] VSS[230] VSS[231] VSS[232] VSS[233] VSS[234] VSS[235] VSS[236] VSS[237] VSS[238] VSS[239] VSS[240] VSS[241] VSS[242] VSS[243] VSS[244] VSS[245] VSS[246] VSS[247] VSS[248] VSS[249] VSS[250] VSS[251] VSS[252] VSS[253] VSS[254] VSS[255] VSS[256] VSS[257] VSS[258]VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301] VSS[302] VSS[303] VSS[304] VSS[305] VSS[306] VSS[307] VSS[308] VSS[309] VSS[310] VSS[311] VSS[312] VSS[313] VSS[314] VSS[315] VSS[316] VSS[317] VSS[318] VSS[319] VSS[320] VSS[321] VSS[322] VSS[323] VSS[324] VSS[325] VSS[328] VSS[329] VSS[330] VSS[331] VSS[333] VSS[334] VSS[335] VSS[337] VSS[338] VSS[340] VSS[342] VSS[343] VSS[344] VSS[345] VSS[346] VSS[347] VSS[348] VSS[349] VSS[350] VSS[351] VSS[352]H46 K18 K26 K39 K46 K7 L18 L2 L20 L26 L28 L36 L48 M12 P16 M18 M22 M24 M30 M32 M34 M38 M4 M42 M46 M8 N18 P30 N47 P11 P18 T33 P40 P43 P47 P7 R2 R48 T12 T31 T37 T4 W34 T46 T47 T8 V11 V17 V26 V27 V29 V31 V36 V39 V43 V7 W17 W19 W2 W27 W48 Y12 Y38 Y4 Y42 Y46 Y8 BG29 N24 AJ3 AD47 B43 BE10 BG41 G14 H16 T36 BG22 BG24 C22 AP13 M14 AP3 AP1 BE16 BC16 BG28 BJ28VSS[0] VSS[1] VSS[2] VSS[3] VSS[4] VSS[5] VSS[6] VSS[7] VSS[8] VSS[9] VSS[10] VSS[11] VSS[12] VSS[13] VSS[14] VSS[15] VSS[16] VSS[17] VSS[18] VSS[19] VSS[20] VSS[21] VSS[22] VSS[23] VSS[24] VSS[25] VSS[26] VSS[27] VSS[28] VSS[29] VSS[30] VSS[31] VSS[32] VSS[33] VSS[34] VSS[35] VSS[36] VSS[37] VSS[38] VSS[39] VSS[40] VSS[41] VSS[42] VSS[43] VSS[44] VSS[45] VSS[46] VSS[47] VSS[48] VSS[49] VSS[50] VSS[51] VSS[52] VSS[53] VSS[54] VSS[55] VSS[56] VSS[57] VSS[58] VSS[59] VSS[60] VSS[61] VSS[62] VSS[63] VSS[64] VSS[65] VSS[66] VSS[67] VSS[68] VSS[69] VSS[70] VSS[71] VSS[72] VSS[73] VSS[74] VSS[75] VSS[76] VSS[77] VSS[78] VSS[79]CougarPoint_R1P0AA17 AA2 AA3 AA33 AA34 AB11 AB14 AB39 AB4 AB43 AB5 AB7 AC19 AC2 AC21 AC24 AC33 AC34 AC48 AD10 AD11 AD12 AD13 AD19 AD24 AD26 AD27 AD33 AD34 AD36 AD37 AD38 AD39 AD4 AD40 AD42 AD43 AD45 AD46 AD8 AE2 AE3 AF10 AF12 AD14 AD16 AF16 AF19 AF24 AF26 AF27 AF29 AF31 AF38 AF4 AF42 AF46 AF5 AF7 AF8 AG19 AG2 AG31 AG48 AH11 AH3 AH36 AH39 AH40 AH42 AH46 AH7 AJ19 AJ21 AJ24 AJ33 AJ34 AK12 AK3VSS[80] VSS[81] VSS[82] VSS[83] VSS[84] VSS[85] VSS[86] VSS[87] VSS[88] VSS[89] VSS[90] VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98] VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158]AK38 AK4 AK42 AK46 AK8 AL16 AL17 AL19 AL2 AL21 AL23 AL26 AL27 AL31 AL33 AL34 AL48 AM11 AM14 AM36 AM39 AM43 AM45 AM46 AM7 AN2 AN29 AN3 AN31 AP12 AP19 AP28 AP30 AP32 AP38 AP4 AP42 AP46 AP8 AR2 AR48 AT11 AT13 AT18 AT22 AT26 AT28 AT30 AT32 AT34 AT39 AT42 AT46 AT7 AU24 AU30 AV16 AV20 AV24 AV30 AV38 AV4 AV43 AV8 AW14 AW18 AW2 AW22 AW26 AW28 AW32 AW34 AW36 AW40 AW48 AV11 AY12 AY22 AY28DINT. HDMICCRTBAQuanta Computer Inc.PROJECT : V02A/RO1ASize Document NumberCougarPoint_R1P0 Date:5 4 3 2Cougar Point 2/7W ednesday, January 19, 2011 Sheet1Rev 1A 10 of 6154321+3.3V_RUNCougar Point (HDA,JTAG,SATA)C617 18P/50V/C0G_4IRQ_SERIRQ SATA0GP10K_4 2 10K_4 21 R189 1 R4141U26A Y1 32.786KHz R461 10M/J_4 RTC_X1 RTC_X2 RTC_RST# SRTC_RST#A20 C20 D20 G22 K22 C17C616D18P/50V/C0G_4RTCX2 RTCRST#LPCRTCX1FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3 FWH4 / LFRAME#C38 A38 B37 C37 D36 E36 LPC_LDRQ0# K36 LPC_LDRQ1# V5 AM3 AM1 AP7 AP5 AM10 AM8 AP11 AP10 AD7 AD5 AH5 AH4 AB8 AB10 AF3 AF1 Y7 Y5 AD3 AD1 Y3 Y1 AB3 AB1 Y11 Y10 AB12 AB13 AH1SATA3_COMP R415 SATA3_RBIAS R395 SATA_COMP R222 IRQ_SERIRQ TP24 TP23LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD332,33 32,33 32,33 32,332DLPC_LFRAME# 32,33PCH JTAG Debug (CLG)5% fine (Intel), 210-&200 (PDDG, Intel) MP remove(Intel)+3.3V_SUS PCH_JTAG_TMS PCH_JTAG_TDI PCH_JTAG_TDO R406 R407 R404 200_4 200_4 200_4SRTCRST#RTC+RTC_CELLR4531M/J_4SM_INTRUDER# PCH_INTVRMENINTRUDER# INTVRMEN+3VLDRQ0# LDRQ1# / GPIO23 SERIRQ SATA0RXN SATA0RXP SATA0TXN SATA0TXP SATA1RXN SATA1RXP SATA1TXN SATA1TXP SATA2RXN SATA2RXP SATA2TXN SATA2TXPIRQ_SERIRQ32 SATA_RXN0 SATA_RXP0 SATA_TXN0 SATA_TXP0 SATA_RXN1 SATA_RXP1 SATA_TXN1 SATA_TXP1 31 31 31 31 31 31 31 31C625 33 ACZ_BITCLK_AUDIO 33 ACZ_SYNC_AUDIO 33 ACZ_SPKR R470 R468 R472SATA 6G27P 50 33_4 ACZ_BITCLK_R 33_4 ACZ_SYNC_R ACZ_SPKR 33_4 ACZ_RST#_RN34 L34 T10 K34 E34HDA_BCLK HDA_SYNC SPKR HDA_RST# HDA_SDIN0 HDA_SDIN1 HDA_SDIN2 HDA_SDIN3 HDA_SDO HDA_DOCK_EN# / GPIO33 HDA_DOCK_RST# / GPIO13SATA HDD/SSDPCH_JTAG_TMS PCH_JTAG_TDI PCH_JTAG_TDO PCH_JTAG_TCK R8356 change 4.7kohm to 51ohm 5/3 (Intel) R427 1 R428 1 R426 1 R40532,33 ACZ_RST#_AUDIO 33 ACZ_SDIN0SATA ODD2 100_4 2 100_4 2 100_4 51_4TP22G34 C34Move Caps to CONN side+RTC_CELL R449 SATA_RXN4 SATA_RXP4 SATA_TXN4 SATA_TXP4 28 28 28 28 R447 20K 20K RTC_RST#CIHDA32 PCH_MELOCKCR471 R4731K_4 33_4 ACZ_SDOUTA34 A36 C36SATA33 ACZ_SDOUT_AUDIOSATA3RXN SATA3RXP SATA3TXN SATA3TXP SATA4RXN SATA4RXP SATA4TXN SATA4TXP SATA5RXN SATA5RXP SATA5TXN SATA5TXPSRTC_RST# C614 1U/6.3V C613 1U/6.3V+3VESATA33SMIBN32+3V_S5TP15 PCH_SPI_CLK C372 *22P_NC 50 NPO TP19 TP21 TP17PCH_JTAG_TCK PCH_JTAG_TMS PCH_JTAG_TDI PCH_JTAG_TDOJ3 H7 K5 H1JTAG_TCK JTAG_TMS JTAG_TDI JTAG_TDOJTAGSATAICOMPO SATAICOMPI SATA3RCOMPO SATA3COMPI37.4/F_4+1.05V_PCH49.9/F_4 750/F_436 PCH_SPI_CLK 36 PCH_SPI_CS0#PCH_SPI_CLK1 R224 12 2 SJ_0402T3 Y14SPI_CLK SPI_CS0# SPI_CS1# SPI_MOSI SPI_MISOCougarPoint_R1P0SATA3RBIASTP16 36 PCH_SPI_SI 36 PCH_SPI_SO PCH_SPI_SI PCH_SPI_SOSPIT1 V4 U3SATALED#P3PCH_SATA_LED#PCH_SATA_LED# 38B+3V +3VSATA0GP / GPIO21 SATA1GP / GPIO19V14 SATA0GP P1BBS_BIT0 12Move to Page12Take care while using GPIO19 for Hot Plug functionBPCH Strap TablePin NameSPKR HDA_SDOStrap descriptionNo reboot mode setting Flash Descriptor SecuritySampled PWROK PWROKConfiguration0 = Default (weak pull-down 20K) 1 = Setting to No-Reboot mode 0 = Default (weak pull-down 20K) 1 = Override+3.3V_SUS R413note*1K_4_NC ACZ_SPKR+3.3V_SUSR474*1K_4_NCACZ_SDOUTADel 0510 INTVRMEN Integrated 1.05V VRM enable ALWAYSRemove SPI_MOSI from PCH strapping, HR_C/L_v0.91Should be always pull-up 0 = Support by 1.8V (weak PD) 1 = Support by 1.5V+RTC_CELL R455 330K_4 PCH_INTVRMENAHDA_SYNCOn-Die PLL VR Volatge SelectRSMRST+3.3V_SUSR4691K_4ACZ_SYNC_R Size Date: Document NumberQuanta Computer Inc.PROJECT : V02A/RO1ACougar Point 3/7W ednesday, January 19, 2011 Sheet1Rev 1A 11 of 61543254321PCI/USBOC# Pull-up(CLG)+3.3V_RUN 8.2K/J_4 8.2K/J_4 8.2K/J_4 8.2K/J_4 10K_4 8.2K/J_4 10K_4 10K_4 *10K_4_NC *10K_4_NC *10K_4_NC R278 R277 R475 R476 R268 R481 R260 R269 R485 R508 R509 PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD# PCIE_MCARD2_DET# PCH_IRQH_GPIO2 SATA_ODD_MD# W W AN_RADIO_DIS# PCI_REQ1# PCI_REQ2# PCI_REQ3#Cougar Point-M (PCI,USB,NVRAM)U26EPLTRST#(CLG)+3.3V_SUSD10KX8B21 M20 AY16 BG46RSVDUSB_OC4# USB_OC1# USB_OC2# USB_OC3#+3.3V_SUS R454 10 9 8 7 61 2 3 4 5USB_OC6# USB_OC0# SIO_EXT_W AKE# USB_OC5#BG26 BJ26 BH25 BJ16 BG16 AH38 AH37 AK43 AK45 C18 N30 H3 AH12 AM4 AM5 Y13 K24 L24 AB46 AB45TP1 TP2 TP3 TP4 TP5 TP6 TP7 TP8 TP9 TP10 TP11 TP12 TP13 TP14 TP15 TP16 TP17 TP18 TP19 TP20RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 RSVD6 RSVD7 RSVD8 RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 RSVD21 RSVD22 RSVD23 RSVD24 RSVD25 RSVD26 RSVD27AY7 AV7 AU3 BG4 AT10 BC8 AU2 AT4 AT3 AT1 AY3 AT5 AV3 AV1 BB1 BA3 BB5 BB3 BB7 BE8 BD4 BF6 AV5 AV10 AT8 AY5 BA2 AT12 BF3C398 *0.1U/10V_NC5DPCI_PLTRST#2 4 1U13 *TC7SH08FU_NC R241 10K_4 PLTRST# PLTRST# 5,18,32,33,351 R239 132 2 SJ_0402TP21 TP22 TP23 TP2410K_4 10K_4 10K_4R511 R512 R510PCI_REQ1# PCI_REQ2# PCI_REQ3#CBE28 BC30 BE32 BJ32 BC28 BE30 BF32 BG32 AV26 BB26 AU28 AY30 AU26 AY26 AV28 AW30TP25 TP26 TP27 TP28 TP29 TP30 TP31 TP32 TP33 TP34 TP35 TP36 TP37 TP38 TP39 TP40RSVD28 RSVD29CPCIPCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD# 14,18 DGPU_HOLD_RST# 14,51 DGPU_PW R_EN 33 PCIE_MCARD2_DET#BK40 K38 H38 G38 C46 C44 E40 D47 E42 F46 G42 G40 C42 D44 K10 C6 H49 H43 J48 K42 H40PIRQA# PIRQB# PIRQC# PIRQD# REQ1# / GPIO50 REQ2# / GPIO52 REQ3# / GPIO54 GNT1# / GPIO51 GNT2# / GPIO53 GNT3# / GPIO55 PIRQE# / GPIO2 PIRQF# / GPIO3 PIRQG# / GPIO4 PIRQH# / GPIO5 PME# PLTRST# CLKOUT_PCI0 CLKOUT_PCI1 CLKOUT_PCI2 CLKOUT_PCI3 CLKOUT_PCI4CougarPoint_R1P0R480USBR479*0_4_NC PCI_REQ1# PCI_REQ2# *0_4_NC PCI_REQ3# BBS_BIT1 PCIE_MCARD2_DET# TP25 PCH_IRQH_GPIO2 SATA_ODD_MD# KB_LED_DET W W AN_RADIO_DIS# TP20 PCI_PME# PCI_PLTRST# R489 R490 R484 22_4 22_4 22_4 CLK_33M_LPC_R CLK_33M_KBC_R CLK_PCI_FB_R+5V +5V +5V +3V +3V +3V +3V +3V +3V +3V31 31 37 33PCH_IRQH_GPIO2 SATA_ODD_MD# KB_LED_DET W W AN_RADIO_DIS#USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N USBP9P USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P USBRBIAS# USBRBIASC24 A24 C25 B25 C26 A26 K28 H28 E28 D28 C28 A28 C29 B29 N28 M28 L30 K30 G30 E30 C30 A30 L32 K32 G32 E32 C32 A32 C33 B33 A14 K20 B17 C16 L16 A16 D14 C14USB_OC0# USB_OC1# USB_OC2# USB_OC3# USB_OC4# USB_OC5# USB_OC6# SIO_EXT_W AKE# USB_BIAS R466USBP1N USBP1P USBP2N USBP2P USBP4N USBP4P USBP5N USBP5P28 28 29 29 33 33 33 33USB2.0 &ESATA LEFT USB2.0 LEFTWLAN WWANPin NameGNT2# / GPIO53Strap descriptionESI strap (Server only) Top-Block Swap OverrideSampled PWROK PWROKConfigurationShould not be pull-down (weak pull-up 20K) 0 = &top-block swap& mode 1 = Default (weak pull-up 20K)USBP8N 30 USBP8P 30 USBP9N 35 USBP9P 35 USBP10N 37 USBP10P 37 USBP11N 25 USBP11P 25CARD READER Express card Biometric CameraGNT3# / GPIO55GNT1# / GPIO5122.6/F_4Boot BIOS Selection 1 [bit-1]PWROKBit 0Bit 1Boot LocationB11 0SPI LPC*GPIO19Boot BIOS Selection 0 [bit-0]PWROKCheck with BIOS program or not? (have to be not)033 CLK_33M_LPC 32 CLK_33M_KBC 13 CLK_PCI_FB+3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5 +3V_S5OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43 OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14USB_OC0# 28 USB_OC1# 29 11 SIO_EXT_W AKE# 32BBS_BIT1R496*1K_4_NCBBS_BIT0R394*1K_4_NCDefault weak pull-up on GNT0/1# [Need external pull-down for LPC BIOS]Check CLKOUT if Skew requirement? DF_TVSR420ADMI and FDI Tx/Rx Termination Voltage2.2K_4 +1.8V_RUNPWROKweak pull-down 20kohm*10P/50V/C0G_4_NC C632C631 18PCLK_33M_LPC CLK_33M_KBCR424 2211 SJ_0402DF_TVS 14 H_SNB_IVB# 5ACheckList_1.0 p58; HR_v1.0 p450Quanta Computer Inc.PROJECT : V02A/RO1ASize Date:5 4 3 2Document NumberCougar Point 4/7Thursday, January 20, 2011 Sheet1Rev 1A 12 of 6154321Cougar Point-M (PCI-E,SMBUS,CLK)U26B+3.3V_RUNSMBus/Pull-up(CLG)R380 R379 2.2K_4 W LAN_SCLK 16,17,31,33WLAN33 33 33 33 33 33 33 33 33 33 33 33PCIE_RXN1 PCIE_RXP1 PCIE_TXN1 PCIE_TXP1 PCIE_RXN2 PCIE_RXP2 PCIE_TXN2 PCIE_TXP2 PCIE_RXN3 PCIE_RXP3 PCIE_TXN3 PCIE_TXP3C415 C4120.1U/10V 0.1U/10VPCIE_TXN1_C PCIE_TXP1_CBG34 BJ34 AV32 AU32 BE34 BF34 BB32 AY32 BG36 BJ36 AV34 AU34 BF36 BE36 AY34 BB34PERN1 PERP1 PETN1 PETP1 PERN2 PERP2 PETN2 PETP2 PERN3 PERP3 PETN3 PETP3 PERN4 PERP4 PETN4 PETP42+3V_S5SMBALERT# / GPIO11 SMBCLK SMBDATAE12 H14 C9PCH_SMB_ALERT# SMBCLK SMBDATA 1K_4 R452 SMBCLK 35 SMBDATA 35 +3.3V_SUS SMBCLKQ49 2N7002W -7-F2.2K_431WWANDSMBUS+3V_S5SML0ALERT# / GPIO60 SML0CLK SML0DATAA12 C8 G12SML0CLK SML0DATADDR_HVREF_RST_PCH5 SMBDATA32C414 C4170.1U/10V 0.1U/10VPCIE_TXN2_C PCIE_TXP2_C10k -& 1k ohm (CRB,Dell)Q47 2N7002W -7-FD1USB 3.0C424 C4270.1U/10V 0.1U/10VPCIE_TXN3_C PCIE_TXP3_CW LAN_SDATA 16,17,31,33Q48 2N7002W -7-F+3V_S5SML1ALERT# / PCHHOT# / GPIO74C13 E14 M16PCH_GPIO74 SMB_CLK_ME1 1 SMB_CLK_ME1 SMB_DATA_ME1 +3.3V_SUS Q46 2N7002W -7-F3PCI-E*+3V_S5 +3V_S5SMBCLK1 32LAN33 33 33 33 35 35 35 35PCIE_RXN5 PCIE_RXP5 PCIE_TXN5 PCIE_TXP5 PCIE_RXN6 PCIE_RXP6 PCIE_TXN6 PCIE_TXP6C421 C4250.1U/10V 0.1U/10VPCIE_TXN5_C PCIE_TXP5_CBG37 BH37 AY36 BB36 BJ38 BG38 AU36 AV36 BG40 BJ40 AY40 BB40 BE38 BC38 AW38 AY38 Y40 Y39SML1CLK / GPIO58 SML1DATA / GPIO75PERN5 PERP5 PETN5 PETP5 PERN6 PERP6 PETN6 PETP6 PERN7 PERP7 PETN7 PETP7 PERN8 PERP8 PETN8 PETP8 CLKOUT_PCIE0N CLKOUT_PCIE0PExpress cardC441 C4430.1U/10V 0.1U/10VPCIE_TXN6_C PCIE_TXP6_CControllerCL_CLK1M7 T11 P10SMB_DATA_ME1 122 3SMBDAT1 32LinkCL_DATA1 CL_RST1#Card reader+3.3V_SUSCCPCH_GPIO74 PCH_SMB_ALERT#10K_4 10K_4R435 R439+3V_S5WLAN33 CLK_PCIE_W LANN 33 CLK_PCIE_W LANP 33 PCIE_CLK_REQ0# 33 CLK_PCIE_W W ANN 33 CLK_PCIE_W W ANP 33 PCIE_CLK_REQ1# 33 CLK_PCIE_USB30N 33 CLK_PCIE_USB30P 33 PCIE_CLK_REQ2# PCIE_CLK_REQ2# PCIE_CLK_REQ1# PCIE_CLK_REQ0#PEG_A_CLKRQ# / GPIO47 CLKOUT_PEG_A_N CLKOUT_PEG_A_P CLKOUT_DMI_N CLKOUT_DMI_P CLKOUT_DP_N CLKOUT_DP_PM10 AB37 AB38 AV22 AU22 AM12 AM13 BF18 CLK_DMIN BE18 CLK_DMIP BJ30 BG30PEG_A_CLKRQ#PEG_A_CLKRQ# 18 CLK_PCIE_VGAN 18 CLK_PCIE_VGAP 18 CLK_CPU_BCLKN 5 CLK_CPU_BCLKP 5 CLK_DP_N 5 CLK_DP_P 5 SMBCLK SMBDATA SML0CLK SML0DATA SMB_CLK_ME1 SMB_DATA_ME1 R446 R443 R423 R441 R440 R437 2.2K_4 2.2K_4 2.2K_4 2.2K_4 2.2K_4 2.2K_4 +3.3V_SUS PCIE_CLK_REQ0# PCIE_CLK_REQ3# PCIE_CLK_REQ4# PCIE_CLK_REQ5# PCIE_CLK_REQ6# PCIE_CLK_REQ7# PEG_B_CLKRQ# 10K_4 10K_4 10K_4 10K_4 10K_4 10K_4 10K_4 R409 R422 R442 R458 R416 R445 R436 +3.3V_RUNJ2 AB49 AB47 M1 AA48 AA47 V10 Y37 Y36PCIECLKRQ0# / GPIO73 CLKOUT_PCIE1N CLKOUT_PCIE1P PCIECLKRQ1# / GPIO18 CLKOUT_PCIE2N CLKOUT_PCIE2P PCIECLKRQ2# / GPIO20 CLKOUT_PCIE3N CLKOUT_PCIE3P PCIECLKRQ3# / GPIO25 CLKOUT_PCIE4N CLKOUT_PCIE4P PCIECLKRQ4# / GPIO26 CLKOUT_PCIE5N CLKOUT_PCIE5P PCIECLKRQ5# / GPIO44 CLKOUT_PEG_B_N CLKOUT_PEG_B_P PEG_B_CLKRQ# / GPIO56 CLKOUT_PCIE6N CLKOUT_PCIE6P PCIECLKRQ6# / GPIO45 CLKOUT_PCIE7N CLKOUT_PCIE7P PCIECLKRQ7# / GPIO46 CLKOUT_ITPXDP_N CLKOUT_ITPXDP_PCougarPoint_R1P0+3V_S5WWAN+3VUSB3.0CLOCKS+3VCLKIN_DMI_N CLKIN_DMI_P CLKIN_GND1_N CLKIN_GND1_PR253 12 10K_4PCIE_CLK_REQ3#A8 Y43 Y45+3V_S5CLKIN_DOT_96N CLKIN_DOT_96P CLKIN_SATA_N CLKIN_SATA_P REFCLK14ING24 CLK_BUF_DREFCLKN E24 CLK_BUF_DREFCLKP AK7 CLK_BUF_DREFSSCLKN AK5 CLK_BUF_DREFSSCLKP K45 CLK_PCH_14M H45 CLK_PCI_FB V47 V49XTAL25_IN XTAL25_OUT C626 27P 50 Y2 25MHz C630 *10P_NC 1 2BLAN33 CLK_PCIE_LANN 33 CLK_PCIE_LANP 33 PCIE_CLK_REQ4# 35 CLK_PCIE_EXPN 35 CLK_PCIE_EXPP 35 PCIE_CLK_REQ5# PCIE_CLK_REQ5# PCIE_CLK_REQ4#PCIE_CLK_REQ1# PCIE_CLK_REQ2#10K_4 10K_4R411 R202 +3.3V_SUSBL12 V45 V46 L14 AB42 AB40+3V_S5PEG_A_CLKRQ# *10K_4_NC 10K_4R211 R212Express card+3V_S5CLKIN_PCILOOPBACK XTAL25_IN XTAL25_OUTCLK_PCI_FB12CLK_REQ/Strap Pin(CLG) Stuff for Integrated CLK Gen ModePEG_B_CLKRQ#E6 V40 V42+3V_S5XCLK_RCOMP Y47 XCLK_RCOMP R25690.9/F_4 C447 *10P_NC 1 2 +1.05V_PCH1C627 1R487 1M/J_422 33P 50CLK_DMIN CLK_DMIP CLK_BUF_DREFCLKN CLK_BUF_DREFCLKP CLK_BUF_DREFSSCLKN CLK_BUF_DREFSSCLKP CLK_PCH_14MR244 R245 R465 R467 R206 R205 R48810K_4 10K_4 10K_4 10K_4 10K_4 10K_4 10K_4PCIE_CLK_REQ6#T13 V38 V37+3V_S5FLEX CLOCKS+3V +3V_S5 +3V +3V +3VCLKOUTFLEX0 / GPIO64 CLKOUTFLEX1 / GPIO65 CLKOUTFLEX2 / GPIO66 CLKOUTFLEX3 / GPIO67K43 CLK_48M_CARD_R F47CLK_VGA_27M_RR266 T33 T3222_4CLK_48M_CARD 30PCIE_CLK_REQ7#K12 AK14 AK13H47 CLK_FLEX2 K49 CLK_VGA_27M_SS__RAXDPCLK_PCIE_XDPN CLK_PCIE_XDPPT38AConfigurable as a GPIO or as a programmable output clock which can be configured as one of the following: CLKOUTFLEX0 /GPIO64 CLKOUTFLEX1 /GPIO65 CLKOUTFLEX2 /GPIO66 CLKOUTFLEX3 /GPIO675 4?33 /27 /48/ 14.318 MHz / DC Output logic ‘0’ unsupported clock output value (Default) / 27/ 14.318 MHz output to SIO/EC /48/24 MHz ? 33/25/27/48/24/14.318 MHz / DC Output logic ‘0’ ? 27/14.318 output to SIO/48/24 MHz (Default)Date:3 2Quanta Computer Inc.PROJECT : V02A/RO1ASize Document NumberCougar Point 5/7W ednesday, January 19, 2011 Sheet1Rev 1A 13 of 6154321Pin NameStrap descriptionOn-die PLL Voltage RegulatorR214Sampled RSMRST#PLL_ODVR_ENConfiguration0 = Disable 1 = Enable (Default)Cougar Point (GPIO,VSS_NCTF,RSVD)U26F BMBUSY#GPIO28T7 A42 H36 E38 C10 C4 G2 2 SJ_change to GPIO14 (Aaron)32 SIO_EXT_SMI# 33 PCIE_MCARD1_DET#DBMBUSY# / GPIO0 TACH1 / GPIO1 TACH2 / GPIO6 TACH3 / GPIO7 GPIO8+3V+3V +3V +3V +3VTACH4 / GPIO68 TACH5 / GPIO69 TACH6 / GPIO70 TACH7 / GPIO71C40 B41 C41 A40T34 T35 T36 T37*1K_4_NCSIO_EXT_SMI# PCIE_MCARD1_DET# SIO_EXT_SCI# ICC_EN# LAN_PHY_PW R_CTRL HOST_ALERT#1 DGPU_PW R_EN R486 1+3V +3V +3V32 SIO_EXT_SCI#GPIO Pull-up/Pull-down(CLG)+3.3V_SUSD+3V_S5 +3V_S5A20GATE PECI RCIN# P4 AU16 P5 AY11 AY10 T14 AY1 AH8 AK11 AH10 AK10CLAN_PHY_PWR_CTRL / GPIO12 GPIO15 +3V_S5 SATA4GP / GPIO16 +3V TACH0 / GPIO17SIO_A20GATESIO_A20GATE 32ICC_EN# LAN_PHY_PW R_CTRLR450 R41910K_4 10K_412,51 DGPU_PW R_EN 18 DGPU_PW ROK 50 DGPU_VREN12SIO_RCIN#SIO_RCIN#32CPU/MISC+3V +3VGPIOPROCPWRGD THRMTRIP# INIT3_3V# DF_TVS TS_VSS1 TS_VSS2 TS_VSS3 TS_VSS4 NC_1H_PW RGOOD 5 PCH_THRMTRIP# R240 390/J_4 PM_THRMTRIP# 5R219*0_4_NC GPIO22T5 E8SCLOCK / GPIO22Add Description in EC GPIO table (keyboard controller reset)+3.3V_RUNSIO_EXT_SMI# SIO_EXT_SCI# SIO_A20GATE SIO_RCIN# USB_MCARD2_DET# USB_MCARD1_DET# BT_RADIO_DIS# FFS_INT2 PCIE_MCARD1_DET# DGPU_HOLD_RST#R483 R477 R194 R389 R430 R429 R431 R216 R482 R21310K_4 10K_4 10K_4 10K_4 10K_4 10K_4 10K_4 *10K_4_NC 10K_4 *10K_4_NCGPIO24 / MEM_LED +3V_S5 GPIO27 GPIO28ROUSH_PAID_TS_DET#E16 P8 K1 K4 V8DSW +3V_S5 +3VDF_TVS 12DO NOT program this pin (BIOS)33 USB_MCARD2_DET# 33 USB_MCARD1_DET#PLL_ODVR_EN USB_MCARD2_DET# USB_MCARD1_DET# GPIO36STP_PCI# / GPIO34 GPIO35 +3VChack When Symbol Update (OK)SATA2GP / GPIO36 +3V SATA3GP / GPIO37 SLOAD / GPIO38C12,18 DGPU_HOLD_RST# 33 W LAN_RADIO_DIS# 33 BT_RADIO_DIS# 31 FFS_INT2 31R478 112SJ_0402 2M5 N2 M3 V13 V3 D6+3V +3V +3V +3VW LAN_RADIO_DIS# BT_RADIO_DIS# FFS_INT2 MODC_EN SV_DET+3VP37ROUSH_PAID_TS_DET# R451 GPIO22 R215 DGPU_PW R_EN R434 10K_4 10K_4 10K_4SDATAOUT0 / GPIO39 SDATAOUT1 / GPIO48 SATA5GP / GPIO49 GPIO57 +3V_S5VSS_NCTF_15 VSS_NCTF_16 VSS_NCTF_17 VSS_NCTF_18BG2 BG48 BH3 BH47 BJ4 BJ44 BJ45 BJ46 BJ5 BJ6 C2 C48 D1 D49 E1R417 +3.3V_SUSA4 A44 A45 A46 A5 A6 B3 B47BVSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8 VSS_NCTF_9 VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14CougarPoint_R1P0VSS_NCTF_19 VSS_NCTF_20 VSS_NCTF_21NCTFVSS_NCTF_22 VSS_NCTF_23 VSS_NCTF_24 VSS_NCTF_25 VSS_NCTF_26 VSS_NCTF_27 VSS_NCTF_28 VSS_NCTF_29 VSS_NCTF_30 VSS_NCTF_31 VSS_NCTF_32BD1 BD49 BE1 BE49 BF1 BF49BCan be del*10K_4_NC SV_DET R418 100K_4E49 F1 F49Have to Reserve+3.3V_SUSHOST_ALERT#1 R425 1K_4Intel ME Crypto Transport Layer Security (TLS) cipher suiteALow = Disable (Default)+3.3V_RUN GPIO36 R221 1 200K 2ASGPIOConfirm with Intel+3.3V_RUN R220 10K_4BMBUSY#:(Intel feedback) Follow CRB checklist, 1K is for intel BIOS validation purpose. BMBUSY#: If not used, require a weak pull-up (8.2- K? to 10 k?) to Vcc3_3. CRB(V1.0)P28: it has 1K PU and 100 ohm on this net for validation purpose.3High = EnableMFG-TEST+3.3V_RUN W LAN_RADIO_DIS# R412 10K_4 Size Date:2Quanta Computer Inc.PROJECT : V02A/RO1ADocument NumberDMI TERMINATION VOLTAGE OVERRIDELow = Tx, Rx terminated to same voltage (DC Coupling Mode) (DEFAULT)BMBUSY#Cougar Point 6/7W ednesday, January 19, 2011 Sheet1Rev 1A 14 of 615454321COUGAR POINT (POWER)VccCORE =1.14A(50mils)U26G +1.05V_PCHVccADAC =1mA(8mils)+VCCA_DAC_1_2 L31 +3.3V_RUN 180ohm/5A 10U/6.3V_6 0.1U/10V 0.01U/25V 22U/6.3V/X5R_8POWERVCCADAC U48+1.05V_PCH_VCCC400 C385 C388 C403 10U/6.3V_6 1U/6.3V 1U/6.3V 1U/6.3VC634 C633 C629 C641Tie to 3.3V_SUS, when don't support Deep SX CP_v1.0 p88+1.05V_PCHR261*0_8_NCCougar Point (POWER)U26JVccDSW3_3= 3mA(8mil)+3.3V_SUSPOWERVCCIO[29] VCCIO[30] N26 P26 P28 T27 T29 T23 T24 V23 V24 P24 T26+1.05V_VCCUSBCORE+1.05V_PCH1 R408 1C6082 2 SJ_04020.1U/10V +VCCPDSWAD49 T16 V12 T38 BH23 AL29 AL24VCCACLK VCCDSW3_3CRTneed 1206?DLVDSC426 *0.1U/10V_NC+ C378 330UAA23 AC23 AD21 AD23 AF21 AF23 AG21 AG23 AG24 AG26 AG27 AG29 AJ23 AJ26 AJ27 AJ29 AJ31VCCCORE[1] VCCCORE[2] VCCCORE[3] VCCCORE[4] VCCCORE[5] VCCCORE[6] VCCCORE[7] VCCCORE[8] VCCCORE[9] VCCCORE[10] VCCCORE[11] VCCCORE[12] VCCCORE[13] VCCCORE[14] VCCCORE[15] VCCCORE[16] VCCCORE[17]C3971U/6.3VVCC COREVSSADACU47Cost Down Point VccALVDS=1mA (8mils)+3.3V_RUNVCCIO[31]C603 *0.1U/10V_NC PCH_VCCDSW +3V_SUS_CLKF33 +1.05V_PCH +1.8V_RUN 0.1uH_8 +1.05V_PCH L14 C407 +VCCAPLL_CPY_PCH *10uH/100mA_8_NC *10U/6.3V_6_NCDDCPSUSBYP VCC3_3[5]VCCIO[32] VCCIO[33] VCCSUS3_3[7]+VCCALVDSVCCSUS3_3 = 119mA (15mils)+3V_VCCPUSB+3.3V_SUSVCCALVDS VSSALVDS VCCTX_LVDS[1] VCCTX_LVDS[2] VCCTX_LVDS[3]AK36 AK37VccTX_LVDS=60mA (10mils)AM37 AM38 AP36 AP37C433 C428 C429 22U/6.3V/X5R_8 0.01U/25V 0.01U/25V+VCC_TX_LVDS L16VCCAPLLDMI2 VCCSUS3_3[8]2 R280 2 C4501 1 SJ_U/10VUSBVCCIO[14] DCPSUS[3]2 R2492+VCCDPLL_CRY 1 1 SJ_.3V_NC +VCCSUS1VCCSUS3_3[9] VCCSUS3_3[10] VCCSUS3_3[6]2 R279 2 C449+3V_VCCAUBG1 1 SJ_U/10VC366+1.05V_PCH+1.05V_PCH_VCCDPLL_EXPAN19+1.05V_PCH L15 C409 +1.05V_VCCAPLL_EXPVCCTX_LVDS[4] VCCIO[28] VCCAPLLEXPAA19 AA21VCCASW[1] VCCIO[34] VCCASW[2] VCCASW[3] V5REF_SUS+VCCAUPLL2 R463 21 +1.05V_PCH 1 SJ_0402BJ22*1uH/25mA_6_NC *10U/6.3V_6_NC+3.3V_RUNVCC5REFSUS=1mA(8mil)M26 +5V_PCH_VCC5REFSUS R227D10 10/F_4 +5V_SUS +3.3V_SUSAA24+3V_VCC_GIOAN16 AN17VCC3_3[6]VCCASW[4] VCCASW[5] VCCASW[6] VCCASW[7] VCCASW[8] VCCASW[9] VCCASW[10] VCCASW[11] VCCASW[12] VCCASW[13] VCCASW[14] VCCASW[15] VCCASW[16] VCCASW[17] VCCASW[18] VCCASW[19] VCCASW[20]Clock and MiscellaneousHVCMOSV33C432 0.1U/10VVCCIO[15] VCCIO[16] VCCIO[17] VCCIO[18] VCCIO[19] VCCIO[20]Vcc3_3 = 0.266A (15mils)AA261 DCPSUS[4] VCCSUS3_3[1] AN23 AN24+VCCA_USBSUS +3V_VCCPSUS C3672VccIO =2.925 A(120mils)AN21+1.05V_PCHVccASW =1.01A (50mils)+1.05V_PCHAA27 AA29 AA31 AC26C371 SDM10K45-7-F 0.1U/10VVCC3_3[7]V34+VCCAFDI_VRM +VCCAFDI_VRM*1U/6.3V_NCV5REF= 1mA(8mil)V5REF P34 +5V_PCH_VCC5REF N20C446SDM10K45-7-F 1U/6.3V R275 D12 10/F_4 +5V_RUN +3.3V_RUNAN26+1.05V_VCCIOAN27PCI/GPIO/LPCVCCVRM[3]AT16+1.05V_PCHCwalt over limit change PD3 useAP21C404 C405 C392 C387 1U/6.3V 1U/6.3V 1U/6.3V 1U/6.3VVccDMI = 80mA (20mils)AT20C384 1U/6.3V +1.05V_PCHC394 C386 C401 C402 C399 C42022U/6.3V/X5R_8 22U/6.3V/X5R_8 1U/6.3V 1U/6.3V 1U/6.3V *0.1U/10V_NCAC27 AC29 AC31 AD291 VCCSUS3_3[2] VCCSUS3_3[3] VCCSUS3_3[4] VCCSUS3_3[5] VCC3_3[1] VCC3_3[8] VCC3_3[4] N22 P20 P22 AA16 W16 T34C431 0.1U/10V +3V_VCCPCORE +3V_VCCPSUS2VCCSUS3_3 = 119mA (15mils)+3.3V_SUSAP23 AP24 AP26 AT24 AN33CVCCIO[22] VCCIO[23] VCCIO[24] VCCIO[25] VCCIO[26] VCC3_3[3]VCCIODMIVCCIO[21]VCCDMI[1]2 R382 2 C5981 1 SJ_V_4VCCCLKDMIAB36+1.1V_VCC_DMI_CCIAD31 W21 W23 W24VccCLKDMI = 20mA (8mils)C396 1U/6.3VVCCPCORE = 28mA(10mils)2 R217 2 C369 1 1 SJ_U/10V+3.3V_RUN +3.3V_RUN+3.3V_RUN+3V_VCC_EXPC611 0.1U/10VAN34 BH29VCCDFTERM[1]AG16 W26 AG17+1.8V_RUNDFT / SPIVCCDFTERM[2] VCCDFTERM[3] VCCDFTERM[4]W29VCCPNAND = 190 mA(15mils)W31 W33+VCCP_NANDAJ16 AJ17C612 0.1U/10V C597 +3.3V_RUN 0.1U/10V +VCCRTCEXTVccVRM(1.5V) =0.16 A(10mils)+VCCAFDI_VRM R243 +VCCAFDI_VRMVCC3_3[2] VCCIO[5]AJ2C430 0.1U/10V+3.3V_RUNAP16 BG6VCCVRM[2] VccAFDIPLL VCCIO[27] VCCDMI[2]CougarPoint_R1P0AF13 AH13 AH14 AF14 AK1 AF11 AC16 AC17 AD17C393 1U/6.3V +1.05V_PCH +V1.1LAN_VCCAPLL +VCCAFDI_VRM L30 C607 *10uH/100mA_8_NC +1.05V_PCH *10U/6.3V_6_NC +V1.05S_SATA3N16 Y49+1.05V_PCH*0_8_NCDCPRTC VCCIO[12] VCCVRM[4] VCCIO[13] VCCIO[6] VCCAPLLSATA VCCVRM[1] VCCIO[7] VCCDIFFCLKN[1] VCCDIFFCLKN[2] VCCDIFFCLKN[3] VCCSSC DCPSST DCPSUS[1] DCPSUS[2] VCCASW[22] VCCIO[2] VCCIO[3]Intel+VCCAFDI_VRM +1.05V_PCH+VCCAFDI_VRM1 R200 1 C3612 2 SJ_V_4+1.05V_PCHFDI1 R397 1+1.05V_VCCDPLL_FDI AP17 2 2 SJ_0805+3V_VCCME_SPIVCCSPI V1C609 1U/6.3VVCCSPI = 20mA(8mils)VccDMI =0.042 A(10mils)+1.05V_PCH2 R381 2 C6001 1 SJ_.3VVCCADPLLA VCCADPLLB80mA(10mils)+1.05V_VCCA_B_DPL +VCCDIFFCLK +VCCDIFFCLKNBF47 AF17 AF33 AF34 AG34 AG33 V16 T17 V19SATAAU2080mA(10mils)+1.05V_VCCA_A_DPLBD47VCCVRM= 114mA(15mils)BB2 R251 2 C423+VCCAFDI_VRM1 1 SJ_.3VVCCDIFFCLKN= 55mA(10mils)2 R250 2 C4221 1 SJ_.3V+V1.05V_SSCVCCVCCSSC= 95mA(10mils)C610 0.1U/10V +VCCSSTVCCIO[4]+1.5V_RUN2 R25821 1 SJ_0603VCCVRM: 1.8V (Destop) 02/20 del for Pre-ES1 1.5V (Mobile)+1.05V_PCHR398*0_6_NC +V1.05M_VCCSUS C604 *1U/6.3V_NC +VTT_VCCPCPU 4.7U/6.3V/U/10V 0.1U/10VT21 V21 T19+1.05V_PCHMISC1mA(8mils)+1.05V_PCH2BJ8V_PROC_IOCPUR388 1 1SJ_9 C602 C606VCCASW[23] VCCASW[21]VCCSUSHDA= 10mA(8mils)R230 *0_4_NC +1.5V_SUSRTC+RTC_CELLC619 C621 C6201U/6.3V 0.1U/10V 0.1U/10VVCCRTCCougarPoint_R1P0HDAVCCRTC&1mA(8mils)A22VCCSUSHDAP32 +V3.3A_1.5A_HDA_IOR229 2 C373211 SJ_V_SUS0.1U/10VAsk PD3, Why leave so many 0 ohm for VCCIO?+1.05V_PCH11+3.3V_RUN1 R505 12 2 SJ_0805C436 10U/10V/0805+1.05V_VCCA_A_DPL R281 C439 1U/6.3V R283 *0_6_NC 1/F +3V_SUS_CLKF33_L111 R507 1 2 2 SJ_0805C455 10U/6.3V_6 +3V_SUS_CLKF33AA1 R506 12 2 SJ_0805C437 10U/10V/0805+1.05V_VCCA_B_DPLAsk PD3 or Intel, why need 1ohm change to +/-5%Change size to 0603C453 1U/10V_4C438 1U/6.3VQuanta Computer Inc.PROJECT : V02A/RO1ASize Document NumberCougar Point 7/7Date:5 4 3 2Rev 1A Sheet 15 of 61Friday, January 21, 2011112345678+1.5V_SUS JDIM1A M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15 M_A_DQ[63:0] 66 M_A_A[15:0]ASO-DIMMA SPD Address is 0XA0 SO-DIMMA TS Address is 0X30R364 R36510K/F_4 10K/F_46 6 6 6 6 6 6 6 6 6 6 6 6 6M_A_BS0 M_A_BS1 M_A_BS2 M_A_CS#0 M_A_CS#1 M_A_CLKP0 M_A_CLKN0 M_A_CLKP1 M_A_CLKN1 M_A_CKE0 M_A_CKE1 M_A_CAS# M_A_RAS# M_A_W E#DIMM0_SA0 DIMM0_SA113,17,31,33 W LAN_SCLK 13,17,31,33 W LAN_SDATAB109 108 79 114 121 101 103 102 104 73 74 115 110 113 197 201 202 200 116 120 11 28 46 63 136 153 170 187BA0 BA1 BA2 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# WE# SA0 SA1 SCL SDA ODT0 ODT1 DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7PC2100 DDR3 SDRAM SO-DIMM (204P)Still Support?+3.3V_RUN199 77 122 125VDDSPD NC1 NC2 NCTEST EVENT# RESET# VREF_DQ VREF_CA VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15+3.3V_RUN 5,17 DDR3_DRAMRST# +SMDDR_VREF_DQ0 8 SMDDR_VREF_DQ0_M3 +SMDDR_VREF_DQ0R14010K/F_4198 302 R14 2 R131 1 SJ_0603 *0/J_6_NC+SMDDR_VREF_DIMM0+SMDDR_VREF_DQ0_R 1 +SMDDR_VREF_DIMM0 1266 6M_A_ODT0 M_A_ODT16 M_A_DQSP[7:0]6 M_A_DQSN[7:0]M_A_DQ