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FM收音机 原理图
54321STMP3410-EVK - D-MajorREVISION HISTORYREV. A - 05-06-02 - Initial ReleaseDTMEvaluation KitDBlock DiagramMAIN MEMORY Page 4NAND FLASH x2 SD/MMC Socket SmartMedia SocketDISPLAYLiquid Crystal Display (LCD) Backlight LEDPage 5Voltage Generation CapacitorsBUTTONSCPage 6CFM TUNERPage 7FM TunerSTMP3410Button MatrixUSB & AUDIOMicrophonePage 2STMP3410Page 3Boot Mode Select DCDC Converter Components Universal Serial Bus (USB) Connector Headphone Connector LINE IN JackBHost ComputerHeadphonesConfigurationBDEVELOPMENT MODEThis mode is for MP3 development using the Debug port and an external power supply.24.576MHz crystalSWITCH MODE SELECTSWITCH POSITION DEBUGPOWER & DEBUGBattery Voltage RegulatorsPage 8DEMONSTRATION MODEThis mode is for normal MP3 playback or battery life measurements using a AAA battery. Debug PortSigmaTel, Inc.3815 Capital of Texas Hwy. Suite 300 Austin, TX 78704 tel: (512)381-3700 www.sigmatel.comASWITCH MODE SELECTSWITCH POSITION DEMOANOTE: Do not use this schematic as a reference - this is not the latest circuit! Please see the STMP3XXX Reference Schematics for the latest circuitry.STMP3410-EVK SchematicsTitleSTMP3410-EVK OverviewSize B Date:5 4 3 2This design is the property of SigmaTel, Inc. It is offered Rev A on an &as is& basis, and carries no implied warranty.Tuesday, October 01, 2002 Sheet11of954321HeadphoneJ1D2 3 4 5 1HP_CONN_RL4 600 Ohms @ 100MHz IND- Ohms @ 100MHz IND-0805+ +C32 220uF 4V CAPuF 4V CAP.01uF CAP- RES-0603HP_GND_A can be used as an antenna for designs with an FM TunerLINE_OUT_R HP_GND_A LINE_OUT_L HP_GND_AUSB ConnectorUSB Jack Pins 5 and 6 are pins connecting to the USB connector outer shield In order to maximize ESD immunity, the industrial design plastics should expose the USB Connector as little as possible. L13, L14, R80, and R81 are placeholders for optional ferrites that can be populated for ESD immunity if necessary. If they are not required, populate a 0 ohm resistor. USB Data series resistors R18 and R19 can be 24-33 Ohms6 J4 Molex 67068 VBUS 1 D- 2 D+ 3 GND 4DCUI SJ-3525NHP_CONN_L HP_GND_ALAYOUT NOTE:C35 0.01uF CAP- RES- 2 Board Edge BOTTOM VIEW CUI STACK SJ-mm Audio Jack 5 4 Plug Inserted This DirectionLAYOUT NOTE:2 3 5 1 4L6 600 Ohms @ 100MHz IND-0805R20 100 RES-0603R21 100 RES-0603TP1USB_5V R18 22 RES- USB_D0 Ohm RES-0603 R81 USB_D+ 0 Ohm RES-0603TOP VIEW MOLEX 67068AGNDAGNDAGNDCLine-In CircuitL21 600 Ohms @ 100MHz J5 2 3 4 5 1 L20 0 Ohm Resistor IND-0805 AGND IND-0805 CAP- Ohms @ 100MHz IND-uF LINE_IN_L CAP-uF LINE_IN_R FM_R FM_LL14 0 Ohm Resistor IND-080565CUI SJ-3525NWhen no plug is inserted into the LINE_IN jack, the LINE_IN_L and LINE_IN_R inputs to the STMP3410 will be connected to the FM Tuner. When a plug is inserted, the FM Tuner will be disconnected.L13 0 Ohm Resistor IND-080522 RES-0603CC36 0.1uF CAP-0603 GND GNDBMicrophoneLINE_IN_R R24 0 Ohm RES-0603 NOPOP VDDIO R25 2.2K RES-0603 10%To use VDDIO to bias the microphone, populate the following components: R25, R26, C38, C39. Do not populate R24. To use LINE_IN_R to bias the microphone, populate R24 with a zero ohm resistor. Do not populate: R25, R26, C38, C39.BR26 2.2K10%RES- 2C37 0.1uF MIC CAP-0603LAYOUT NOTE:1 2 1 OUTPUT 2 GROUNDMicrophone Panasonic WM-52BM+ C39 0.1uF CAP-0603C38 10uF Tantalum 10VC97 CAP CAP-0603 NOPOPSigmaTel, Inc.3815 Capital of Texas Hwy. Suite 300 Austin, TX 78704 tel: (512)381-3700 www.sigmatel.comBOTTOM VIEWAAGNDAGNDPANASONIC WM-52B Microphone CartridgeASTMP3410-EVK SchematicsTitleUSB & Audio ConnectionsSize B Date:5 4 3 2This design is the property of SigmaTel, Inc. It is offered Rev A on an &as is& basis, and carries no implied warranty.Tuesday, October 01, 2002 Sheet12of954321STMP-Pin TQFP - BOOST MODESilkscreen Labels: &MODE SELECT&SW1 1 PSWITCH VDD_BAT 5 6DVDDIO R66 10K RES-0603&DEBUG& &DEMO&VDD_BATT_REG 1.5V_BATTERY VDDD_REGC2 0.01uF CAP-0603C3 0.1uF CAP-0603C4 1uF CAP-0805+2 3 4C1 68uF CAP-7243C42 1uF CAP-0805 GNDGND VDDDVDDD 87 9One cap for each pin (39, 11, 86)L1 0 Ohm Resistor IND-0805DVDDIO 1110 12 EG4208 4PDT SwitchVDDIO_REGC5 0.1uF CAP-0603+C6 0.1uF CAP-0603C7 0.1uF CAP-0603C9 0.01uF CAP-0603C10 0.1uF CAP-0603C11 1uF CAP-0805C8 68uF CAP-7243GND1.5V_BATTERYL2 4.7uH 1 W Panasonic: ELL-6SH4R7MOne cap for each pin (29, 96) VDDIOGND VDD_BAT C12 0.1uF CAP-0603 PSWITCH 79 49 47 48 U1 GND 50 54 39 11 86 38 10 87 29 96 28 97 GND C13 0.1uF CAP-0603+C14 68uF CAP-7243C15 1uF CAP-0805pswitchdcdc_gnddcdc_mode2dcdc_vddiodcdc_vddddcdc_battvddio1 vddio2vddd1 vddd2 vddd3GND USB_D+ USB_D80 81 67 66 usb_dplus usb_dminus vag vbg vdda1 vdda2vssio1 vssio2vssd1 vssd2 vssd3The L2 inductor is a critical component - for best battery life, L2 should be a quality, low-ESR inductor. The Panasonic ELL6H inductor or equivalent is recommended for this component.POWER TESTPOINTS37 36 35 34 33 32 31 30 IO7 IO6 IO5 IO4 IO3 IO2 IO1 IO0 TP24 1.5V_BATTERY TP25 VDDIO TP26CNOTE: Vag and Vbg filter caps should have their ground return paths to VssA1, pin 72.CLAYOUT NOTE: Part foot print should + C16 support a 0603 or a 10uF Tantalum 3216 capacitor. 10V Only one will be populated at a time. AGNDR2 470K 1% RES-0603 NOPOPC17 0.1uF CAP-0603One cap for each pin VDDA (73, 61)C18 0.1uF CAP-.1uF CAP-060373 61GP31_d7 GP30_d6 GP29_d5 GP28_d4 GP27_d3 GP26_d2 GP25_d1 GP24_d0AGND AGND72 60 VDDA 64 C20 0.1uF CAP-0603 AGND 70vssa1 vssa2 vddhpGP55_sm-wpn GP54_sm-wen GP56_sm-ready_cf-waitn GP51_cf-iowrn GP52_cf-iordn GP42_cf-a10 GP41_sm-ale_cf-a9 GP40_sm-cle_cf-a8 GP39_sm-sen_cf-a7 GP38_sm-ce0n_cf-a6 GP37_sm-ce2n_cf-a5 GP36_sm-ce3n_cf-a4 GP35_cf-a3 GP34_cf-a2 GP33_cf-a1 GP32_cf-a0 GP45_sm-ce1n_cf-ce0n GP53_sm-ren_cf-oen GP43_cf-regn GP50_cf-resetn GP44_cf-ce1n GP49_cf-bvd1 GP48_cf-wpn GP47_cf-ireq GP46_cf-cdn GP7_I2S-data-O2 GP6_I2S-data-O1 GP5_I2S-data-O0 GP4_I2S-sck GP3_I2S-lrclk GP2_I2S-data-I2 GP1_I2S-data-I1 GP0_I2S-data-I0 GP11 GP9 GP10 GP8 testmode GP14_SPI-mosi GP13_SPI-miso GP12_SPI-sck GP16_I2C-scl GP17_I2C-sda27 26 25 9 8 22 21 20 19 18 17 16 15 14 13 12 24 23 44 43 7 45 42 41 40WP# WE# FLASH_RDY GPIO_51 GPIO_52 GPIO_42 ALE CLE SE# CE0# CE2# CE3# GPIO_35 GPIO_34 GPIO_33 GPIO_32 CE1# RE# GPIO_43 GPIO_50 GPIO_44 GPIO_49 GPIO_48 GPIO_47 GPIO_46VDDDSTMP3410-TA3 POST ENABLEGPIO POST ENABLED DISABLED 00 1 0GPIO_00 R5 47K RES-0603 10% NOPOP GND R4 47K RES-0603 10% VDDIO C21 0.1uF CAP-0603UNASSIGNED LRADC INPUTTP6 REMOTE63vsshp vrefn vrefp line_out_right line_out_left mic lradc battery line_in_right line_in_leftSTMP341071 LINE_OUT_R LINE_OUT_L MIC REMOTE VDD_BAT LINE_IN_R LINE_IN_L 65 62 55 58 56 59 57100-Pin TQFPSetting this option to 1 will cause a Power On Self Test (POST) to be performed. Setting it to 0 will disable the Power On Self Test Note: POST MUST be enabled on TA3 and subsequent revisions.UNASSIGNED GPIOsTP2 I2C_DATA TP3 I2C_CLK TP4 WP# TP5 GPIO_33adcl vddxtal vddpll vsspll adcr xtali xtaloBonce_dsi once_dso once_dsk once_drnSTMP3410-TA3 BOOT MODE SELECTGPIO BOOT MODE I2C_MASTER I2C_SLAVE NAND_FLASH_0 SPI_SLAVE BURN_IN TESTER USB 08 01 02 03 0 1 1 1 1 0 0 0 0 1 1 0 1 1 0 1 0 0 0 1 1 1 0 1 1 1 1 1 1 1 1 Default mode is NAND_FLASH_1. This mode uses GPIO_34 (typically configured as PLAY) to enter Flash Recovery Mode. NAND_FLASH_0 uses PSwitch to enter Flash Recovery Mode. All resistors are 47K RES0603. However, it may be necessary to use a stronger pull-down, such as a 10K, depending on the LCD used. Populate either a pull-up or a pull-down on these GPIOs to select the desired Boot ModeC22 0.001uF CAP-.001uF CAP-060368 6998 GP19_tio1 99 GP18_tio0 100 GP15_SPI-ssBGROUNDING & POWERVDDA I2C_DATA I2C_CLK SPI_SCK SPI_MISO SPI_MOSI SPI_SS GPIO_18 GPIO_19 GPIO_08 AGND 1 1 JP6 2 0 Ohm Resistor RES-0603 JP1 1 2 NOPOP RES-0603 JP2 2 0 Ohm Resistor RES-0603 JP3 1 2 NOPOP RES-0603 GND VDDD76787775 7446 52 51 5388 89 90 91 92 93 94 95 82 83 85 84VDDA C24 0.1uF CAP-0603AGNDNAND_FLASH_1 0C25 0.1uF CAP-0603GNDAGNDXTAL must be close to the STMP3410Y1 24.576MHz6 1 2 3 4 5GPIO_10 GPIO_09 GPIO_11 AGNDVDDIO1R8 47K RES-0603 10% R9 47K RES-0603 10% NOPOP R94 47K RES-0603 10%C26 22pF CAP-0603C27 22pF CAP-0603GPIO_00 GPIO_01 GPIO_02 GPIO_03 AGNDGPIO_08 GPIO_01AR7 47K RES-0603 10% NOPOPAGNDGPIO_04 GPIO_05Tie all grounds together under the STMP3410. Populate only one of JP1, JP2, and JP3.GPIO_02 GPIO_03LAYOUT NOTE:ONCE_DSI GPIO_06A7R10 47K RES-0603 10% R11 47K RES-0603 10% NOPOP R12 47K RES-0603 10%89101112Optional test points for debug via ONCE portONCE_DSO ONCE_DSK ONCE_DRNGPIO_07SigmaTel, Inc.3815 Capital of Texas Hwy. Suite 300 Austin, TX 78704 tel: (512)381-3700 www.sigmatel.com123456Title0GNDTOP VIEW E-SWITCH EG4208 4PDT SWITCHSTMP3410-EVK SchematicsSTMP-Pin TQFP Boost ModeSize C Date:This design is the property of SigmaTel, Inc. It is offered Rev A on an &as is& basis, and carries no implied warranty.Tuesday, October 01, 20021Sheet3of9543254321Integration NAND FlashU3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 NC NC NC NC NC SE R/B RE CE NC NC VCC VSS NC NC CLE ALE WE WP NC NC NC NC NC NC NC NC NC I/O7 I/O6 I/O5 I/O4 NC NC NC VCC VSS NC NC NC I/O3 I/O2 I/O1 I/O0 NC NC NC NC 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 VDDIO IO7 IO6 IO5 IO4 VDDIO C41 0.1uF CAP-0603 IO3 IO2 IO1 IO0 VDDIO GND L18 0 Ohm Resistor IND-K RES-0603 MMC_SS MMC_DETECT MMC_WP MMC_DATA_OUT MMC_CLK MMC_DATA_IN MMC_CS R103 47K RES-0603 GND L19 0 Ohm Resistor IND-0805 GND 11 10 8 7 6 5 4 3 2 1 9 12 13 VDDIO VDDIO R100 10K RES-0603 U13 CARD_DETECT CE2# WRITE_PROTECT RSV DO Vss2 SCLK Vdd Vss DI CS RSV SOCKET_GND SOCKET_ESD_GND AVX #: 10
833 MMC/SD Socket SMEDIA_SENSE SM_WP_SENSE RES-0603 NOPOP R102 0 Ohm CE1# RES-0603 NOPOP VDDIO 23 24 R27 47K RES-0603 NOPOP R28 10K VDDIO RES-0603 NOPOP 25 26 27 28 L15 0 Ohm NOPOP IND-0805 SENS2 SENS1 FLASH_RDY RE# IO4 IO5 IO6 IO7 R101 0 Ohm R34 10K RES-0603 NOPOP CLE_i ALE_i WE#_i IO0_i IO1_i IO2_i IO3_i 2 3 4 5 6 7 8 9 11 13 14 15 16 17 19 20 21MultiMedia Card SocketSmartMedia SocketVDDIO U2 L16 CLE ALE WE# WP# D0 D1 D2 D3 CD# D4 D5 D6 D7 LVD R/B# RE# CE# VCC VCC GND GND GND 12 22 1 10 18 0 Ohm NOPOP IND-0805 VDDIOOn Page LabelsIO7 IO6 IO5 IO4 IO3 IO2 IO1 IO0 FLASH_RDY RE#STMP3XXX LabelsIO7 IO6 IO5 IO4 IO3 IO2 IO1 IO0DGNDDFLASH_RDY RE# CE0#R99 10K RES-0603C100 0.1uF CAP-0603 NOPOPC101 0.1uF CAP-0603 NOPOPVDDIO C40 0.1uF CAP-0603One cap next to each SmartMedia VCC input pinGNDFLASH_RDY RE# CE0# CE2# CLE ALE WE# WP# GPIO_32 GPIO_52 SPI_SCK SPI_MOSI SPI_MISO SPI_SS GPIO_32 GPIO_52 CE3# I2C_CLK I2C_DATACGNDCLE ALE WE# VDDIOIf using only one NAND, use CE1# for the SmartMedia Socket. If using two NANDs, use CE2# for the SmartMedia Socket NOTE: The polarity of SMEDIA_SENSE has changed from previous designs. It is now active low. L15 and L16 are optional ferrites that may be required for ESD immunity. If they are not required, populate a 0-ohm resistor.CE0# CE2# CLE ALE WE# WP# SMEDIA_SENSEC94 0.1uF CAP-0603 GNDSamsung #: K9F5608U0A TSOP-48 32 MBGNDNAND FlashU14 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 NC NC NC NC NC SE R/B RE CE NC NC VCC VSS NOPOP NC NC CLE ALE WE WP NC NC NC NC NC NC NC NC NC I/O7 I/O6 I/O5 I/O4 NC NC NC VCC VSS NC NC NC I/O3 I/O2 I/O1 I/O0 NC NC NC NC 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25L15 and L16 are optional ferrites that may be required for ESD immunity. If they are not required, populate a 0-ohm resistor.FWDSENS1 FWDSENS2 SHELL1 SHELL2SM_WP_SENSE MMC_CLK MMC_DATA_IN MMC_DATA_OUTR29 47K RES-0603 NOPOPGNDFLASH_RDY RE# CE1#IO7 IO6 IO5 IO4 VDDIOMMC SOCKET AVX 10
833GNDC96 0.1uF CAP-0603 NOPOPGNDYamaichi #: CN015R-3113-0 SmartMedia Socket NOPOP GNDMMC_SS MMC_DETECT MMC_WP MMC_CSVDDIOC13 SCLK GND DATA_OUT RSV RSV CS# DATA_IN GND12GNDSmartMedia Bus SwitchThis Bus Switch allows hot plugging of the SMC card. It is optional for players that do not require hot plug support. Note that this 74LS3245 Bus Switch must be the type with no direction control.VDDIO U5 74LS3245 CLE ALE WE# IO0 IO1 IO2 IO3 1 2 3 4 5 6 7 8 9 10 GND n/c A0 A1 A2 A3 A4 A5 A6 A7 GND NOPOP Vdd BE# B0 B1 B2 B3 B4 B5 B6 B7 20 19 18 17 16 15 14 13 12 11 SMEDIA_SENSE CLE_i ALE_i WE#_i IO0_i IO1_i IO2_i IO3_iI2C_CLK I2C_DATAGNDIO3 IO2 IO1 IO0GND9 1 2 3 4 5 6 7 8Samsung #: K9F5608U0A TSOP-48 32 MBVDDC95 0.1uF CAP-0603 NOPOPCLE ALE WE# VDDIOFLASH_RDY PullupVDDIO R35 10K RES-0603 FLASH_RDY11 10R30 RES-0603 NOPOP R31 RES-0603 NOPOPCARD_DETECT#WRITE_PROTECTWRITE_PROTECT LOW = UNLOCKED HIGH = LOCKEDTOP VIEWR32 RES-0603 NOPOP R33 RES-0603 NOPOP0-Ohm Resistor Pads used to Bypass the Bus Switch (Place resistor pads under the switch IC)R36 RES-0603 NOPOP R37 RES-0603 NOPOP R38 RES-0603 NOPOPBBSTMP3XXX CHIP ENABLE ASSIGNMENTIf using more than one NAND chip, the first chip MUST be attached to CE0#, the second MUST be attached to CE1#, and the third MUST be attached to CE2#. The software requires that the NAND chip enables start at CE0# and be consecutive. If using a NAND and a SmartMedia Card, the SmartMedia Card Chip Enable should be the next consecutive available Chip Enable. If using a NAND and a MMC Card, it is recommended that the MMC Card use CE3# by default, but this is not required.NOTE: This is not the latest circuit! Please see the STMP3XXX Reference Schematics for the latest circuitry.AASigmaTel, Inc.3815 Capital of Texas Hwy. Suite 300 Austin, TX 78704 tel: (512)381-3700 www.sigmatel.comSTMP3410-EVK SchematicsTitleNAND Flash, SmartMedia, & MMCSize C Date:5 4 3 2This design is the property of SigmaTel, Inc. It is offered Rev A on an &as is& basis, and carries no implied warranty.Tuesday, October 01, 20021Sheet4of954321LCDVDDIO 1 2 C43 0.1uF CAP-0603 VDDIO C44 0.1uF CAP-.1uF CAP-.1uF CAP-uF CAP- 0.1uF CAP- 0.1uF CAP- 10 11 C50 1uF CAP-uF CAP-.1uF CAP- 14 15 V2 6 V4 V3 GND 4 V5 3 U6 Vdd C86 GNDOptional LEDsUse for development on LED-only players. For battery life measurement on LCD players, remove R106.VDDIO R106 0 Ohm RES-0 RES-0603 10% D8 LTST-C150GKT D9 LTST-C150GKT R108 510 RES-0603 10% D10 LTST-C150GKT R109 510 RES-0603 10%ZXM61N02F3 2 G D S 1IntegrationOn Page LabelsLCD_CS# LCD_DS LCD_RS LCD_D0 LCD_D1 LCD_D2 LCD_D3STMP3XXX LabelsGPIO_08 GPIO_10DSOT-23 TOP VIEWDGPIO_11 GPIO_00 GPIO_01 GPIO_02 GPIO_03 GPIO_04 GPIO_05 GPIO_06 GPIO_07 GPIO_44 GPIO_09CD Q2 ZXM61N02FCT S G GPIO_06 R111 47K RES-0603 3D Q3 ZXM61N02FCT S G GPIO_07 R112 47K RES-0603 3D Q4 ZXM61N02FCT SLCD_D4 LCD_D5 LCD_D6 LCD_D7 LCD_RESET11G GPIO_05 3 22CAP2+ CAP2CAP1CAP+ CAP3Vout GND2V1R110 47K RES-06031GNDGNDGNDBL_ONCBacklight LEDVDDIO R47 100 RES-0603 NOTE: D1 is built into the LCD holder 1 D Q1 ZXM61N02FCT S 2LCD Expansion HeaderJ7 LCD_DS LCD_R/W# LCD_D7 LCD_D5 LCD_D3 LCD_D1 VDDIO 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 LCD_RS LCD_CS# LCD_D6 LCD_D4 LCD_D2 LCD_D0GND LCD_D7 LCD_D6 LCD_D5 LCD_D4 LCD_D3 LCD_D2 LCD_D1 LCD_D0BD1 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 E R/W# A0 RES# CS# NC NCG BL_ON R49 47K RES-0603 3LCD_RESET BL_ONLCD_DS LCD_R/W# LCD_RS LCD_RESET LCD_CS#BVDD_BATHEADER 18X2 NOPOP GNDR51 47K RES-0603R52 Shing Yih LCD 47K RES-0603LCD CIRCUITS LAYOUT NOTE:LCD EXPANSION HEADER PIN ONEGNDGNDTHRU-HOLES FOR LCD HOLDER MOUNTATHRU-HOLES FOR LCD HOLDER MOUNTSigmaTel, Inc.3815 Capital of Texas Hwy. Suite 300 Austin, TX 78704 tel: (512)381-3700 www.sigmatel.comACATHODE THIS IS THE D1 LED TOP VIEW SHING-YIH LCD HOLDERANODE TitleSTMP3410-EVK SchematicsLCD, LCD Backlight, & LEDSize B Date:3 2This design is the property of SigmaTel, Inc. It is offered Rev A on an &as is& basis, and carries no implied warranty.Tuesday, October 01, 2002 Sheet15of95454321Power & Play SwitchesR123 VDDIO 1K 10% RES-0603DIntegrationPLAY_SW R146 10K RES-0603SW 16 1 3 2 4 Momentary Tact Switch&PLAY / PAUSE&R39 10K RES-0603 NOPOP R143VDDIOSW 17 1 3 2 4 Momentary Tact SwitchGND PSWITCHPSWITCH_A1K 10% RES-0603&POWER&R144 47K 10% RES-0603NOTE: R146 is not represented on the PCB layout (it is populated between pins 3 and 5 of SW16). This pulldown resistor is necessary in order to use Debug Mode, since Debug Mode requires separate Power and Play buttons. In Demo Mode (and on most players) it is not necessary, and R39 should be loaded instead.On Page LabelsPLAY_SW SCAN_C4 SCAN_C3 SCAN_C2 SCAN_C1 SCAN_R3 SCAN_R2 SCAN_R1 PSWITCH HOLD_SWSTMP3XXX LabelsGPIO_34DGPIO_42 GPIO_46 GPIO_47 GPIO_48 GPIO_50 GPIO_43 GPIO_49 PSWITCH GPIO_35GNDButtonsCHold SwitchVDDIO SCAN_C1 SCAN_C2 SCAN_C3 SCAN_C4Silkscreen Labels: &HOLD SWITCH&SW 2 1 HOLD_SW 2 3 4 5 6 EG2209 DPDT Switch R40 47K RES-0603C&ON& &OFF&R43 47K RES-0603SW3 1 3 2 4 Momentary Tact SwitchSW 4 1 3 2 4 Momentary Tact SwitchSW 5 1 3 2 4 Momentary Tact Switch&MENU&SCAN_R3&VOL+&&VOL-&GNDSW6 1 3 2 4 Momentary Tact SwitchBSW 7 1 3 2 4 Momentary Tact SwitchSW 8 1 3 2 4 Momentary Tact SwitchSW 9 1 3 2 4 Momentary Tact SwitchB&&&&SCAN_R2&&&&&ERASE&&A-B&SW 10 1 3 2 4 Momentary Tact SwitchSW 11 1 3 2 4 Momentary Tact SwitchSW 12 1 3 2 4 Momentary Tact SwitchSW 13 1 3 2 4 Momentary Tact SwitchLAYOUT NOTE:&STOP&SCAN_R1&RECORD&&EQ.&&MODE&LAYOUT NOTE:123R44 10K RES-0603AR45 10K RES-0603R46 10K RES-0603Silkscreen Labels: Place a white box under each button for writing in the button function. Also place the default function as listed by each button.1 5 3TOP VIEW2 4 5TOP VIEW E-SWITCH EG2209 DPDT SWITCH TitleSigmaTel, Inc.63815 Capital of Texas Hwy. Suite 300 Austin, TX 78704 tel: (512)381-3700 www.sigmatel.com4AGNDPanasonic EVQ-PHP03T TACT SWITCHSTMP3410-EVK SchematicsButtonsSize B Date:This design is the property of SigmaTel, Inc. It is offered Rev A on an &as is& basis, and carries no implied warranty.Tuesday, October 01, 2002 Sheet16of9543254321J8LAYOUT NOTE:J8 PIN 1DHP_GND_A1 2 2.0mm HEADER NOPOP J9 C54 47pF CAP-0603 NOPOPJ9L8 CoilCraft#: 0603CS-R10X_BG 180nH @ 150MHz NOPOP C55 22pF CAP-0603 NOPOP FM_AGNDC53 100pF CAP-0603 NOPOPTP7IntegrationOn Page LabelsFM_CLOCK FM_DATA FM_RFM_AGNDUse HP_GND_A as an antennaNOPOP HP_GND_ASTMP3XXX LabelsGPIO_18 GPIO_19 FM_R FM_L SE# R104DFM_R FM_L MPX GND VDDIO FM_DATA FM_CLOCK FM_WE BUS_EN OPT1 OPT2PIN 1 TOP VIEW11 10 9 8 7 6 5 4 3 2 1 2.0mm HEADER NOPOP FM_AGNDR53 100K RES-0603 NOPOPFM_AGND R54 22 10% + C56 100nF CAP-0603 NOPOP C114 10uF Tantalum 10V NOPOP RES-0603 NOPOP VDDIOFM_L BUS_ENGPIO_51 FM_WE 0 Ohm RES-0603 NOPOP R105 CE2# 0 Ohm RES-0603VDDIO R58 22 10% RES-0603 NOPOP L11 CoilCraft#: 0603CS-33NX_BG 33nH @ 250MHz NOPOP C60 33nF CAP-0603 NOPOP L12 CoilCraft#: 0603CS-33NX_BG 33nH @ 250MHz NOPOPC57 4n7F CAP-0603 NOPOP D6 Philips BB202 NOPOP R57 R56 100K 10K RES-0603 RES-0603 FM_AGND NOPOP NOPOP C61 33nF CAP-0603 NOPOPFM_AGND R55 18K RES-0603 NOPOPCC403938373635343332U931FM_AGNDLOOPSWTCAGCRFGNDAGNDAVCCNC1 2 3 4IFGAIRFI2RFI1NCC58 22nF CAP-0603 NOPOPC59 22nF CAP-0603 NOPOPD7 Philips BB202 NOPOPNC CPOP VCOT1 VCOT2 VCOVCC DGND DVCC DATA CLOCKNC DIFL2 DIFL1 TCIFC30 29 28 27 26 25 24 23 22 21 FM_AGND C69 FM_R 100nF CAP-0603 NOPOP C70 FM_L 100nF CAP-0603 NOPOP C63 33nF CAP-0603 NOPOP C64 330pF CAP-0603 NOPOP C65 33nF CAP-0603 NOPOP C66 47nF CAP-0603 NOPOP C67 47nF CAP-0603 NOPOP C68 47nF CAP-0603 NOPOP MPXFM_AGND VDDIO R59 22 10% RES-0603 NOPOP C62 100nF CAP-0603 NOPOP FM_GND FM_GND5 6 7 8 9 10 VDDIOPHILIPS TEA5767HN NOPOPVREF MPXO TMUTE RAVO LAVOBBBUSENNC BUSM W/RNC XTAL1 XTAL2 SWP1 SWP2 PDLF PHLF 19 NC FM_AGND 2011121314151617FM_DATA FM_CLOCK FM_WE BUS_EN OPT1 OPT2 TP14 NOPOP TP13 NOPOPR61 47K VDDIO RES-0603 NOPOP18R125 47K RES-0603 NOPOPR126 47K RES-0603 NOPOPR127 47K RES-0603 NOPOPR128 47K RES-0603 NOPOPJP4 1ASigmaTel, Inc.3815 Capital of Texas Hwy. Suite 300 Austin, TX 78704 tel: (512)381-3700 www.sigmatel.comC73 1nF CAP-0603 NOPOP Y2 32.768KHz NOPOP FM_GND5 4R60 33K RES-0603 C74 NOPOP 22pF CAP-0603 NOPOP C75 22nF CAP-0603 NOPOP2 0 Ohm NOPOP RES-0603 GND JP5AC76 2n2F CAP-0603 NOPOPC77 2n2F CAP-0603 NOPOPFM_GND1FM_GND FM_AGND2 0 Ohm NOPOP RES-0603 FM_AGNDSTMP3410-EVK SchematicsTitleFM Tuner - Philips TEA5767HNSize B Date:This design is the property of SigmaTel, Inc. It is offered Rev A on an &as is& basis, and carries no implied warranty.Tuesday, October 01, 2002 Sheet17of93254321J6 PJ-202A-2.0mm 1 2F1 Littelfuse#: PR 1 5 500mA + C107 10uF Tantalum 10V C109 0.1uF CAP-U15 VIN EN GND GND VOUT 2 R113 15.4K RES-0603 1% R119 10.0K RES-0603 1% VDDIO_A R13 0 Ohm RES-.01uF CAP-0603 + C104 10uF Tantalum 10VVDDIO_REGUSB Power CircuitD11 LTST-C150GKTVDDIO R130 100K 10% RES-0603 NOPOPADJ4Silkscreen Label: &REG. POWER&R120 510 RES-0603 10% Q12 2SD2210 NOPOP Q6 Si2312DS NOPOP VDD_BATREG102GA-ADGNDGNDUSB_5V R141 620 10% RES-0603 NOPOPQ5 MMBTV_BATTERY_S NOPOPR131 USB_5V 150K 10% R132 47K 10% RES-0603 NOPOP RES-0603 NOPOPDREG102GA-A6USB_5VD12R135 200 10%Q7 FMMT591A/SOT NOPOP R133 47K 10% RES-0603 NOPOPMMBT39041 2 B C E 3BZX84C2V41 2 SOT-23 TOP VIEW A K 31 2 3 4 5 TOP VIEW SOT-223-5 1 5GND U16 VIN EN GND GND VOUT 2 GND R114 5.10K RES-0603 1% R121 10.0K RES-0603 1% VDDD_A R1 0 Ohm RES-.01uF CAP-0603 VDDD_REGD13 BZX84C2V4LT1 2.4V Zener NOPOPDL4148 RES-0603 MINIMELF NOPOP R145 NOPOP 200 10% NOPOP RES-0603PJ-202A Power JackC111 0.1uF CAP-0603R140 Q9 MMBT3904 NOPOP C105 10uF Tantalum 10V R3 2.2K RES-0603 10% PSWITCH_A 10K RES-0603 NOPOP 3SOT-23 TOP VIEW6 3ADJ4REG102GA-AC2SD2210E C C 42 3 1+Si2312DS1 2 G D S 3FMMT591AC1 2B C E 3TOP VIEW1 3 2To use the USB Power circuit, remove R129 and set the MODE SELECT switch to DEMO. The circuit will not function in DEBUG mode.2 1Center Shunt SleeveU17 1 5 C113 0.1uF CAP- VIN EN GND GND VOUT 2B SC-62 TOP VIEWSOT-23 TOP VIEWSOT-23 TOP VIEWGND VDD_BATT_REG R115 1.91K RES-0603 1% R122 10.0K RES-0603 1% C112 0.01uF CAP-0603 + C106 10uF Tantalum 10V R6 2.2K RES-0603 10% TP12 TP8 TP9 TP10 TP11PINOUTADJ4AAA BATTERYBT1 1.5V_BATTERY_S 1 R129 0 Ohm RES-V_BATTERYBREG102GA-ABVout = [1 + R(Vout-ADJ)/R(ADJ-GND)] x 1.26V Vout 3.3V 3.2V 3.0V 1.9V 1.5V R(Vout-ADJ) 16.2K 15.4K 13.7K 5.10K 1.91K R(ADJ-GND) 10.0K 10.0K 10.0K 10.0K 10.0KAGNDAGNDGNDGNDGNDPOS+GNDDEBUG PORT_VDDIO NEG 2 GND AAA Battery HolderOPTIONAL HIGH/LOW VOLTAGE SWITCHIf not using this option, short R13 and R1, and NOPOP SW14. VDDIO_REG To set V(high) = 3.3V and V(low) = 2.96V, set R113 = 16.2K, R119 = 10.0K, and R13 = 2.0K. VDDD_REG To set V(high) = 1.9V and V(low) = 1.58V, set R114 = 5.1K, R121 = 10.0K, and R1 = 10.0K.4SW 14 VDDIO_A VDDD_A 4 2 3 1 SW DIP-2 CK SDA02H1SKD GNDR65 10K RES-0603 ONCE_DSI ONCE_DSO ONCE_DSK ONCE_DRN PSWITCHR68 R67 10K 10K RES-0603 RES- 3 5 7 9 11 13 2 4 6 8 10 12 14Silkscreen should show the outline of a battery. Silkscreen text should read: &Warning: do NOT insert battery backwards.& Route GND back to battery negative terminal as either a 30mil trace or as part of a wide digital ground planeOPTIONAL BATTERY POWER JUMPERASigmaTel, Inc.KEY GNDAttach this jumper to run in Demo mode using the external power supply to provide 1.5V off the regulator into VDD_BAT. Do not use this jumper if a AAA battery is installed or in DEBUG mode.J3 VDD_BATT_REG 1.5V_BATTERY_S 1 2 0.1& HEADER NOPOP5ONDEZ3815 Capital of Texas Hwy. Suite 300 Austin, TX 78704 tel: (512)381-3700 www.sigmatel.comAHEADER 7X2 R69 10K RES-K RES-0603STMP3410-EVK SchematicsTitlePower & DebugGND3 2Size B Date:This design is the property of SigmaTel, Inc. It is offered Rev A on an &as is& basis, and carries no implied warranty.Tuesday, October 01, 2002 Sheet18of954321DEBUGDUSBPWRDLCD & BACKLIGHTFM TUNERPOWER & AAA BATTERYKEYPAD BUTTON MATRIXC CSTMP3410 BLOCK SMARTMEDIA / MMC BLOCK (on back)LINE OUT LINE INBBPCB SPECIFICATIONS 4-LAYER 0.062& THICKNESS DARK BLUE SOLDER MASK SILKSCREEN SHOULD HAVE THE FOLLOWING INFORMATION:ASigmaTel, Inc.3815 Capital of Texas Hwy. Suite 300 Austin, TX 78704 tel: (512)381-3700 www.sigmatel.comSTMP3410-EVK ASSY REV. PCB REV. A (in copper) SERIAL NUMBER5 4 3STMP3410-EVK SchematicsTitleAMechanical InformationSize A Date:This design is the property of SigmaTel, Inc. It is offered Rev A on an &as is& basis, and carries no implied warranty.Tuesday, October 01, 20022Sheet91of9
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解读车载AMFM收音机电路_电子/电路_工程科技_专业资料。解读车载AMFM收音机电路解读车载 AM/FM 收音机电路随着汽车从代步工具转变为集休闲、 娱乐为一体的个性化消费...通信工程系电子综合实践课程设计 FM/AM 收音机原理与制作 学生姓名 学号 通信工程 计算机通信 所在系 专业名称 班级 指导教师 二○一二年六月 目 录 目录 ......CD9088 集成电路各引脚的功能如表 其直流参数如表 袖珍电调谐调频收音机的电原理图如图所示 FM 信号由天线引进后从 CD9088 集成块 11 脚进入混频电路,电感 L1...FM收音机大全_调查/报告_表格/模板_实用文档。收集了多个FM收音机电路图,对FM收音机维修有一定帮助 SP1088 自动调谐 FM 收音机电路 产品概述: SP1088 是一块...FM分立元件立体声收音机电路原理图_电子/电路_工程科技_专业资料 暂无评价|0人阅读|0次下载|举报文档 FM分立元件立体声收音机电路原理图_电子/电路_工程科技_专业...8管胆FM收音机原理图2_电子/电路_工程科技_专业资料。B R 5 3 p F E 1 C45 6 R19 8 2 3 1 L C32 u 1 H F p 0 0 2 1 4 6/20P C20 9 ...调频收音机原理框图 FM 图形所示 输入信号 混频 收音机的电原理图及电路板如下图所示: 四、实习步骤: 1.焊接 (1)烙铁的使用 烙铁是焊接的主要工具之一,焊接...FM 收音机印制电路板的设计 一、 FM 收音机印制电路板的设计。 ㈠必需的...㈢印制电路板的设计: 1、在原理图.Sch 中给各元件指定采用的封装。 a. ...被放大的信号与本地振荡器产生的本振信号在 内部进行 FM 混频,混频后输出。 图 1-1 FM 收音机原理框图 FM 混频信号由 FM 中频回路进行选择, 提取以中频 10...AM FM收音机实习报告_信息与通信_工程科技_专业资料。AM FM收音机实习报告 指导样本文书AM/FM 收音机的安装与调试ξ1 概述一、实习目的: 实习目的: 1、 学习收...
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